Advanced ASIC FPGA Verification Engineer
General Dynamics
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How this pay compares to similar roles
This role pays less than 75% of similar roles. Most pay $161,975–$216,250 — the blue band above. At the midpoint, this role pays about $161k versus about $189k for comparable roles.
Based on 240 similar postings.
Employer
General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.
General Dynamics currently has 1351 open roles on FindRole.
Listed pay typically runs $124,093–$150,385 across 1176 roles with salary data.
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At a glance
The Sr Advanced ASIC FPGA Engineer joins the engineering team to lead the definition, design, verification, and documentation of ASIC and FPGA developments. This role involves determining architecture, system simulation, and detailed design approaches while defining module interfaces and device simulation. Key responsibilities include evaluating process flows such as synthesis, place and route, timing, and power utilization. The engineer will create test plans, verify results, and analyze performance for complex hardware projects. Required technical skills include SystemVerilog, Verilog, Assertions (SVA), OVM, UVM, Digital Signal Processing (DSP), functional coverage, constrained random testing, and formal verification. The position requires solving complex engineering problems, managing technical tasks for small teams, and ensuring hardware reliability through rigorous analysis of specifications and foundry technologies.
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