Advanced ASIC FPGA Engineer

General Dynamics

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Hybrid

Quick summary

Work type
Hybrid
Location
Scottsdale, AZ
Salary
$122,785–$136,215 / yr
Posted
5 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $187k
This role $130k
$111k $230k
below market most similar roles pay here above market

This role pays less than 92% of similar roles. Most pay $159,612–$214,000 — the blue band above. At the midpoint, this role pays about $130k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About General Dynamics

General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.

General Dynamics currently has 1377 open roles on FindRole.

Listed pay typically runs $124,093–$150,385 across 1184 roles with salary data.

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At a glance

TL;DR · Advanced ASIC FPGA Engineer

Role Posting Log in to save

The Advanced ASIC FPGA Engineer- (Sign-on Bonus Available) joins the engineering team to manage the full product life cycle, including requirements, design, implementation, and testing. The role involves defining architectures, determining system simulation approaches, and creating detailed design plans for ASIC and FPGA developments. Key responsibilities include evaluating process flows like synthesis, place and route, and timing, while verifying test results to ensure functional criteria are met. Candidates must be proficient in VHDL and Verilog RTL coding, micro-architecture design, and digital design tool flows. Required technical skills include scripting in Tcl, Python, or Perl, and familiarity with tools like Vivado, Libero, and QuestaSim. The work focuses on solving complex hardware engineering problems, including high reliability design, clock-domain-crossing, and digital signal processing.

Skills

ASIC FPGA Verilog VHDL SystemVerilog Python Tcl Perl Vivado Libero ISE Synplify QuestaSim UVM OVM SVA Digital Design Synthesis Place and Route Timing Closure Clock-Domain-Crossing Logic Analyzer Oscilloscope

What you'll do

  • Define, design, verify, and document ASIC and FPGA developments throughout the product life cycle.
  • Determine architecture, system simulation, and detailed design approaches for hardware projects.
  • Define module interfaces and all aspects of device design and simulation.
  • Evaluate process flows including high-level design, synthesis, place and route, timing, and power utilization.
  • Create test and simulation plans to establish functional criteria and verify results.
  • Select components and equipment based on analysis of specifications and reliability.
  • Research and analyze customer design proposal specifications and manuals to determine design feasibility.
  • Identify opportunities to apply AI for continuous improvement and innovation.

What we're looking for

  • U.S. citizenship is required.
  • Must be able to obtain a TS/SCI security clearance within a reasonable time.
  • Bachelor's degree in Electrical or Computer Engineering, or a related field.
  • 5+ years of job-related experience, or a Master's degree and 3 years of job-related experience.
  • Proficiency in HDL (VHDL/Verilog) and micro-architecture design.
  • Proficiency in scripting languages such as Tcl, Python, or Perl.
  • Proficiency in async design principles, timing closure, and constraint generation.
  • Experience with Xilinx and Microchip FPGAs, associated tools, and verification tools (preferred).

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