Advanced ASIC FPGA Engineer
General Dynamics
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How this pay compares to similar roles
This role pays less than 77% of similar roles. Most pay $162,000–$216,250 — the blue band above. At the midpoint, this role pays about $161k versus about $189k for comparable roles.
Based on 240 similar postings.
Employer
General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.
General Dynamics currently has 1377 open roles on FindRole.
Listed pay typically runs $124,093–$150,385 across 1184 roles with salary data.
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At a glance
The Sr Advanced ASIC FPGA Engineer joins the engineering team to lead the definition, design, verification, and documentation of ASIC and FPGA developments. This role involves determining architecture, system simulation, and detailed design approaches while defining module interfaces and device simulation. The engineer evaluates process flows including synthesis, place and route, timing, and power utilization. Key responsibilities include creating test plans, analyzing performance, and reviewing vendor capabilities. The position requires proficiency in SystemVerilog, Verilog, Assertions (SVA), OVM, UVM, and Digital Signal Processing (DSP). Candidates must utilize constrained random testing and formal verification to solve complex problems. The work focuses on developing high-technology solutions for defense and scientific missions, requiring a strong understanding of engineering processes and project leadership principles like Earned Value and Statistical Process Controls.
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