ASIC FPGA Engineer

General Dynamics

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Quick summary

Work type
On-site
Location
Pittsfield, MA
Salary
$109,037–$120,963 / yr
Posted
2 days ago
Freshness
Confirmed live today
Nearby
98 roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $115k
$95k most similar roles pay here $239k

This role pays less than 98% of similar roles. Most pay $167,225–$217,525 — the shaded band above. At the midpoint, this role pays about $115k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About General Dynamics

General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.

General Dynamics currently has 1026 open roles on FindRole.

Listed pay typically runs $124,397–$154,401 across 931 roles with salary data.

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View all roles at General Dynamics

At a glance

TL;DR · ASIC FPGA Engineer

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The ASIC FPGA Engineer joins the engineering team to manage the definition, design, verification, and documentation of ASIC and FPGA developments. This role involves determining architecture, system simulation, and detailed design approaches while defining module interfaces and evaluating process flows including synthesis, place and route, timing, and power utilization. The engineer creates test plans to establish functional criteria, verifies results, and analyzes performance. Key technical requirements include proficiency in VHDL for digital design and simulation, hands-on experience with Microsemi or Xilinx FPGA development, and expertise with Vivado, Libero, Mentor, and Cadence EDA tools. Additionally, the role requires hardware integration using oscilloscopes, logic analyzers, and JTAG debuggers. The work focuses on solving complex technical challenges in the domain of high technology solutions for defense and scientific applications.

Skills

ASIC FPGA VHDL Vivado Libero Mentor Cadence Xilinx Microsemi JTAG Oscilloscopes Logic Analyzers Synthesis Place and Route power utilization Tape-out

What you'll do

  • Define, design, verify, and document ASIC and FPGA developments.
  • Determine architecture, system simulation, and detailed design approaches for hardware components.
  • Define module interfaces and all aspects of device design and simulation.
  • Evaluate process flows including high-level design, synthesis, place and route, timing, and power utilization.
  • Create test and simulation plans to establish functional criteria and analyze performance results.
  • Review vendor capabilities, foundry technologies, device libraries, and simulation tools.
  • Perform hardware integration using lab tools such as oscilloscopes, logic analyzers, and JTAG debuggers.

What we're looking for

  • U.S. citizenship is required.
  • Ability to obtain a DoD Security Clearance within 18 months.
  • Active DoD Secret security clearance (preferred).
  • Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering, or Mathematics field, plus at least 5 years of experience; or Master's degree plus 3 years of experience.
  • Strong proficiency in VHDL for digital design and simulation.
  • Hands-on experience with Microsemi and/or Xilinx FPGA development.
  • Proficiency with Vivado, Libero, Mentor, and/or Cadence EDA tools.
  • Hardware integration experience with lab tools such as oscilloscopes, logic analyzers, and JTAG debuggers.
  • ASIC design or tape-out experience (preferred).
  • PCB/circuit board design background (preferred).
  • FPGA-to-ASIC conversion experience (preferred).

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