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VLSI Physical Design Floorplanning Place and Route Static Timing Analysis Clock Tree Synthesis Physical Verification DRC LVS Power Integrity IR Drop Analysis RC Extraction Digital Design Mixed-Signal Design Computer Architecture ICC2 PrimeTime dc_shell Innovus SeaHawk Python C++ C Perl TCL Linux SKILL Make Design Compiler Scheme +25 more Show less

Python C++ Machine Learning Agentic AI Large Language Models Combinatorial Optimization EDA VLSI Circuit Design CMOS Layout DRC LVS Spice Data Structures Algorithms Applied Math +11 more Show less

VLSI Design AI HW/SW Co-Design Python PyTorch SystemVerilog C++ High-Level Synthesis (HLS) Machine Learning Quantization Tensor Decomposition Digital VLSI Circuits Hardware Accelerator Architecture Tapeout +8 more Show less

Python C++ Machine Learning Agentic AI Large Language Models Combinatorial Optimization EDA VLSI Circuit Design Algorithms Data Structures CMOS Layout Spice DRC LVS Electronic Design Automation +11 more Show less

ASIC Design RTL Design SoC FPGA Machine Learning IPs System Simulation Logic Design Scripting Process Automation Verification Data Center IPs Protocols Interfaces +8 more Show less

ASIC Design SoC Design RTL Design FPGA Machine Learning IPs System Simulation Scripting Logic Design Verification Process Automation Data Center IPs Protocols Interfaces +8 more Show less

Python LLMs Machine Learning Deep Learning RAG Vector Databases Agentic Frameworks CI/CD Version Control VLSI Design CAD Flow Data Structures Algorithms Circuit Design HW Design +10 more Show less

Python C++ PyTorch LangChain LangGraph Deep Learning AI/ML EDA VLSI ASIC Circuit Design SPICE Data Science Agentic Workflows Automation Algorithms Silicon Analysis +11 more Show less

VLSI Physical Design FinFET Verilog RTL Computer Architecture Clock Tree Synthesis Static Timing Analysis Physical Verification Sign Off IR Drop Analysis Parasitic Extraction Floor planning Perl C Tcl SRAM Digital Circuits +12 more Show less

C++ VLSI Physical Design Machine Learning Python Perl Tcl ICC2 Innovus PrimeTime Tempus StarRC Distributed Computing Multithreading Reinforcement Learning GNNs EDA Tools +11 more Show less

C++ VLSI Physical Design Machine Learning Python Perl Tcl ICC2 Innovus PrimeTime Tempus StarRC Distributed Computing Multithreading Reinforcement Learning Graph Neural Networks Parallel Computing EDA Tools +13 more Show less

VLSI Design Synthesis DFT CDC RDC SpyGlass CDC SpyGlass Lint JasperGold Meridian SerDes LPDDR5 DDR4 DDR5 HBM RTL Sign-off Verification +12 more Show less

VLSI Physical Design Verilog RTL Static Timing Analysis Clock Tree Synthesis Floor planning Placement Routing Parasitic Extraction IR drop analysis Electromigration Physical Verification Sign Off Perl C Tcl Computer Architecture SRAM Digital Circuits +14 more Show less

C++ VLSI Physical Design Computational Geometry Graph Theory Placement Routing Floorplanning Machine Learning Multithreading Distributed Computing ICC2 Innovus CAD EDA Visualization C++17 C++14 +12 more Show less