Senior Software R&D Engineer, VLSI Physical Design

Nvidia

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: Santa Clara, CAAustin, TX
Salary: $168,000–$264,500 / yr
Posted: 106 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $194k

This role $216k

$137k most similar roles pay here $278k

This role pays more than 76% of similar roles. Most pay $172,000–$216,250 — the shaded band above. At the midpoint, this role pays about $216k versus about $194k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior Software R&D Engineer, VLSI Physical Design

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As a Senior Software R&D Engineer, VLSI Physical Design, you will join the team responsible for developing software and tools that determine the physical layout, speed, and efficiency of advanced AI chips. You will implement, enhance, and optimize tools for chip level placement, reshaping, and route optimization while creating innovative algorithms for computational geometry, fast routing, and graph optimization. Your work involves developing machine learning strategies to improve design space exploration and extending GUIs to improve designer insight and visualization. The role requires expertise in C++, C++17/C++14, multithreading, and distributed computing. You must possess a strong understanding of computational geometry, placement, routing, and graph theory while being familiar with tools like ICC2 and Innovus. This position focuses on solving complex optimization challenges to improve PPA for next-generation architecture in the semiconductor space.

Skills

C++ VLSI Physical Design Computational Geometry Graph Theory Machine Learning ICC2 Innovus Multithreading Distributed Computing Algorithm Development C++17 C++14

What you'll do

Implement and optimize tools for chip-level placement, reshaping, and route optimization.
Create innovative algorithms for computational geometry, fast routing, and block arrangement.
Develop machine learning strategies to improve the efficiency of design space exploration.
Extend existing GUIs to improve designer insight, debugging, and visualization capabilities.
Develop high-performance C++ code for physical design analysis and software tools.
Identify new optimization opportunities and develop solutions to improve chip PPA.
Work closely with design teams to implement technical solutions for advanced AI chips.

What we're looking for

BS, MS, PhD, or equivalent experience in Electrical Engineering or Computer Science.
Strength in both CAD software and VLSI hardware design.
6+ years of experience in software development with C++.
Good understanding of computational geometry, placement, routing, and graph theory.
Familiarity with design implementation tools such as ICC2 and Innovus.
Expertise in algorithm development for physical design, analysis, and visualization.
Strong communication and interpersonal skills.
Experience in high performance software design including multithreading, distributed computing, and efficient memory/IO use.

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