Senior Software R&D Engineer, VLSI Physical Design

Nvidia

Confirmed live today High trust

Hybrid

Quick summary

Work type: Hybrid
Location: Santa Clara, CAAustin, TX
Salary: $168,000–$264,500 / yr
Employment: Full-time
Posted: 152 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k

This role $216k

$135k $278k

below market most similar roles pay here above market

This role pays more than 79% of similar roles. Most pay $166,175–$216,250 — the blue band above. At the midpoint, this role pays about $216k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Software R&D Engineer, VLSI Physical Design

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The Senior Software R&D Engineer, VLSI Physical Design joins a team responsible for the entire process of defining the physical layout, speed, and efficiency of advanced AI chips. The role involves implementing, enhancing, and deploying new tools for chip level placement, reshaping, and route optimization. Key responsibilities include creating innovative algorithms for computational geometry, placement, and fast routing to efficiently arrange blocks. The engineer will also develop machine learning strategies to improve design space exploration and extend GUIs for better designer insight and visualization. Required skills include C++, computational geometry, graph theory, and experience with tools like ICC2 and Innovus. The position focuses on solving complex optimization challenges to improve PPA for next-generation architecture by developing software that directly defines hardware layout.

Skills

C++ VLSI Physical Design Computational Geometry Graph Theory Placement Routing Floorplanning Machine Learning Multithreading Distributed Computing ICC2 Innovus CAD EDA Visualization C++17 C++14

What you'll do

Implement and optimize new tools for chip-level placement, reshaping, and route optimization.
Create innovative algorithms for computational geometry, fast routing, and block arrangement.
Develop and implement machine learning strategies to improve design space exploration efficiency.
Extend existing GUIs to improve designer insight, debugging, and visualization.
Develop C++ code to determine the physical layout, speed, and efficiency of AI chips.
Identify new optimization opportunities and develop solutions to implement them with design teams.
Write high-performance software utilizing multithreading, distributed computing, and efficient memory management.

What we're looking for

BS, MS, PhD or equivalent experience in Electrical Engineering or Computer Science.
Strength in both CAD software and VLSI hardware design.
6+ years experience in software development with C++.
Good understanding of computational geometry, placement, routing, and graph theory.
Familiarity with design implementation tools such as ICC2 and Innovus.
Expertise in algorithm development for physical design, analysis, and visualization.
Strong communication and interpersonal skills.
Experience in high performance software design including multithreading, distributed computing, and efficient memory and I/O use (preferred).

Software R&D Engineer, VLSI Physical Design

Nvidia

Austin, TX +1 97 days ago $116,000–$189,750

C++ VLSI Physical Design Machine Learning Python Perl Tcl ICC2 Innovus PrimeTime Tempus StarRC Distributed Computing Multithreading Reinforcement Learning Graph Neural Networks Parallel Computing EDA Tools

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