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Active Keyword: Subsystem Design Remove filter Clear all

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Hardware Design Validation Engineer, Memory Subsystem

Nvidia

Santa Clara, CA 3 days ago $108,000–$184,000
Actively hiring Confirmed live yesterday Posted this week High trust Below market
DDR Memory Tuning Signal Integrity Oscilloscopes Schematic Capture Board Design C C++ Java Python Perl Windows OS Linux Firmware
2+ yrs exp
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Senior Design Verification Engineer, GPU Memory Subsystem

Nvidia

Durham, NC 5 days ago $136,000–$218,500
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
System Verilog Verilog UVM Python C++ ASIC Verification RTL Computer Architecture Testbench Development Regression Triage Coverage Closure Debug Caches Coherency Pipelines Arbitration Interconnect Networks Algorithms Data Structures
5+ yrs exp
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Staff Engineer, GPU Design Verification (Subsystems)

Samsung Electronics

Austin, TX +1 20 days ago $151,000–$251,800
Actively hiring Confirmed live yesterday High trust Competitive pay
SystemVerilog UVM C++ Python Perl GPU Design Verification Constrained-Random Testing Coverage-Driven Verification RTL Computer Architecture Hardware Modeling Emulation Performance Profiling Formal Verification
6+ yrs exp
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Next-Gen High-Speed HBM LPDDR Memory Subsystem ASIC Digital Design Engineer

Qualcomm

San Diego, CA 25 days ago $145,600–$218,400
Actively hiring Confirmed live 2 days ago Trusted Competitive pay
ASIC Design RTL Coding Hardware Architecture LPDDR HBM NoC SRAM Cache Controller x86 ARM Synthesis Timing Closure Physical Design Gate Level Simulation Power Analysis Digital Design ISA Architecture
4+ yrs exp
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Design Verification Engineer, Memory Subsystem

Qualcomm

Santa Clara, CA 25 days ago $159,600–$239,400
Actively hiring Confirmed live yesterday Trusted Competitive pay
SystemVerilog UVM Verilog SystemVerilog Assertions ASIC SoC Formal Verification Constrained-Random Verification Coverage-Driven Verification LPDDR DDR HBM JEDEC UPF AXI APB AHB DFI RTL Simulation
4+ yrs exp
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Next-Gen High-Speed Memory Subsystem ASIC Digital Design Engineer

Qualcomm

San Diego, CA 25 days ago $145,600–$218,400
Actively hiring Confirmed live yesterday Trusted Competitive pay
Verilog SystemVerilog ASIC Design RTL Design Synopsys Synthesis Low Power Design Python C C++ Computer Architecture Coverage-based Design Verification SOC Interconnects Memory Controllers micro architecture
4+ yrs exp
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Electrical Hardware Design Engineer Subsystems

General Dynamics

Pittsfield, MA 36 days ago $95,384–$105,817
Actively hiring Confirmed live yesterday High trust Below market
FPGA Development Mixed Circuit Analysis Hardware Design Circuit Analysis Electrical Engineering AI
2+ yrs exp
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Senior Staff Engineer, GPU Design Verification (Subsystems)

Samsung Electronics

San Jose, CA +1 46 days ago $180,200–$297,200
Actively hiring Confirmed live yesterday Trusted Above market
SystemVerilog UVM C++ Python Perl GPU Design Verification Constrained-Random Testing Coverage-Driven Verification RTL Computer Architecture Hardware Modeling Emulation Performance Profiling Formal Verification
10+ yrs exp
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Lead Hardware Design Validation Engineer, Memory Subsystem

Nvidia

Santa Clara, CA 95 days ago $168,000–$258,750
Actively hiring Confirmed live yesterday High trust Competitive pay
HBM GDDR DRAM ASIC VLSI Mixed Signal Design Signal Integrity Linux Scripting Data Analysis Hardware Design Board Design ATE High-Performance Computing Artificial Intelligence
10+ yrs exp
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Hardware Design Validation Engineer, Memory Subsystem

Nvidia

Santa Clara, CA 102 days ago $108,000–$184,000
Actively hiring Confirmed live yesterday High trust Below market
DDR Memory Tuning Mixed Signal Digital Design Embedded Systems Signal Integrity Schematic Capture Board Design C C++ Java Python Perl Linux Windows OS Oscilloscopes High-Performance Computing Firmware
2+ yrs exp
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