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Digital Hardware Design Schematic Capture PCB Layout FPGA Embedded Processors PCIe DDR3 DDR4 SDRAM JESD UART SPI 1000BASE-T Mentor Graphic’s Git ClearCase Confluence Logic Analyzers BERTs Signal Intelligence Machine Learning Image Processing +17 more Show less

FPGA VHDL Digital Signal Processing DSP Vivado Quartus Libero MATLAB Simulink Xilinx Altera Microsemi RF Digital Circuit Design Schematic Generation PWB Layout Oscilloscope Logic Analyzer Signal Generator +14 more Show less

FPGA VHDL Digital Signal Processing Vivado Quartus Libero MATLAB Simulink AMD (Xilinx Intel (Altera Microchip (Microsemi Circuit Design Schematic Generation PWB Layout Oscilloscope Logic Analyzer Signal Generator RF Encryption +14 more Show less

CAD VLSI Portable Stimulus Simulation Emulation Digital IC Design Verification Methodologies Design Specifications RF Analog Foundry Process Technology +6 more Show less

Mixed-Signal Verification UVM SystemVerilog Verilog VHDL SVA Static Timing Analysis Logic Synthesis Place and Route Formal Verification Python Perl TCL CMOS Bipolar EDA Tools +11 more Show less

FPGA VHDL Verilog SystemVerilog RTL SoC Python Tcl Linux Git CI/CD AMD (Xilinx Intel/Altera Vitis Ethernet PCIe JESD204 SPI I2C UART CAN MIL-STD-1553 DO-254 Jira +19 more Show less

Hardware Design Schematic Capture PCB Layout FPGA Embedded Processors RF Circuits Mentor Graphic’s Git ClearCase Confluence SPI UART PCIe DDR3 DDR4 JESD 1000BASE-T Logic Analyzers BERTs Signal Intelligence Machine Learning Image Processing +17 more Show less

Hardware Design Schematic Capture PCB Layout FPGA Embedded Processors RF Circuits Simulations PCIe SPI UART SDRAM DDR3 DDR4 JESD 1000BASE-T Mentor Graphic’s Git ClearCase Confluence Logic Analyzers BERTs Signal Intelligence Machine Learning Image Processing +19 more Show less

Digital Design SoC AXI CHI CXS.B CXL PCIe UA-Link Signal Integrity (SI) Power Integrity (PI) Mixed-Signal Design Algorithm Design Silicon Design Platform Integration Performance Optimization +10 more Show less

Schematic Capture Signal Integrity FPGAs Micro Controllers Allegro Digital Signal Processing Worst Case Analysis Stress Analysis High Reliability AI +5 more Show less

VLSI Design Synthesis DFT CDC RDC SpyGlass CDC SpyGlass Lint JasperGold Meridian SerDes LPDDR5 DDR4 DDR5 HBM RTL Sign-off Verification +12 more Show less

Verilog System Verilog RTL UVM Static Timing Analysis Synthesis P&R SerDes Ethernet InfiniBand PCIe USB Firmware Digital Design +9 more Show less

RTL ASIC Design NVLink PCI-Express Ethernet UCIE Network-on-Chip Micro-architecture Synthesis Data Movers Protocol Adaptors SoC Integration Formal Verification High-speed Connectivity AI Infrastructure +10 more Show less