Senior Digital Design Engineer

Nvidia

Quick summary

Work type: On-site
Location: Santa Clara, CA · Austin, TX · Redmond, WA
Salary: $136,000–$218,500 / yr
Posted: 3 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $178k

This role $177k

$121k most similar roles pay here $229k

This role pays more than 66% of similar roles. Most pay $142,400–$213,375 — the shaded band above. At the midpoint, this role pays about $177k versus about $178k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 985 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 971 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · Senior Digital Design Engineer

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Join our Semi-Custom Silicon products group as a Senior Digital Design Engineer, where you will contribute to the development of NVLink Fusion based AI infrastructure System-on-Chips. Your daily tasks include analyzing architectural requirements, performing trade-off analysis for implementation, and delivering high-performance RTL blocks that are efficient in terms of area and power. You will craft micro-architecture specifications, implement them in high-quality RTL, and ensure full verification and clean synthesis timing. Collaboration with chip architects, verification engineers, and SoC integration teams is essential to meet project goals efficiently. Additionally, you will identify and integrate appropriate IP solutions for specific use cases. Ideal candidates have a degree in Electrical or Computer Engineering, 5+ years of relevant experience, expertise in high-speed connectivity protocols like NVLink and PCI-Express, and a strong background in ASIC design flows and methodology.

Skills

NVLink PCI-Express Ethernet UCIE ASIC RTL Verilog System-on-Chip Network-On-Chip High-speed connectivity protocols Chip architects Verification engineers Formal verification engineers SoC integration engineers Data movers Protocol adaptors Arbiters Schedulers

What you'll do

Analyze architectural requirements and perform trade-off analysis for implementation.
Deliver high-performance, area-efficient RTL blocks that meet power efficiency criteria.
Craft micro-architecture specifications and implement them in high-quality RTL code.
Collaborate with verification engineers to ensure fully verified and timing-clean blocks.
Identify and integrate appropriate IP solutions for specific use cases.

What we're looking for

5+ years of experience in digital design engineering.
Bachelor's or Master's degree in Electrical/Computer Engineering.
Experience with high-speed connectivity protocols like NVLink, PCI-E, Ethernet.
Proven ability to deliver high-performance RTL blocks and IP solutions.
Deep understanding of ASIC design flows and methodologies.
Strong analytical skills and excellent teamwork abilities.

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