Senior Digital Design Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CAAustin, TXRedmond, WA
Salary: $136,000–$218,500 / yr
Posted: 100 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $183k

This role $177k

$126k most similar roles pay here $228k

This role pays more than 60% of similar roles. Most pay $151,211–$214,000 — the shaded band above. At the midpoint, this role pays about $177k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior Digital Design Engineer

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As a Senior Digital Design Engineer within the Semi-Custom Silicon products group, you will join the NVLink Fusion design team to develop AI infrastructure System-on-Chips. Your daily responsibilities involve analyzing architectural requirements, performing trade-off analyses for implementation, and delivering high-performance, area, and power-efficient RTL blocks. You will craft micro-architecture specifications, implement high-quality RTL, and ensure blocks are synthesis and timing clean while collaborating with architects, verification engineers, and SoC integration engineers. The role involves identifying, customizing, and integrating IP solutions for specific use cases. Required expertise includes experience with high-speed connectivity protocols like NVLink, PCI-Express, Ethernet, and UCIE, alongside a proven track record of delivering high-bandwidth datapath blocks such as data movers, protocol adapters, network-on-chip, arbiters, and schedulers. You must possess a deep understanding of ASIC design flows and methodologies to solve complex connectivity problems.

Skills

RTL ASIC Design NVLink PCI-Express Ethernet UCIe System-on-Chip Network-on-Chip Micro-architecture Synthesis Formal Verification SoC Integration High-speed Connectivity

What you'll do

Analyze architectural requirements and perform trade-off analyses for hardware implementation.
Develop high-performance, area-efficient, and power-efficient RTL blocks.
Create detailed micro-architecture specifications for the design team.
Deliver fully verified, synthesis-clean, and timing-clean blocks.
Identify, customize, and integrate appropriate IP solutions for specific use cases.
Implement high-bandwidth datapath blocks including data movers, protocol adapters, and network-on-chip components.

What we're looking for

Bachelor's or Master's Degree in Electrical Engineering or Computer Engineering (or equivalent experience).
5+ years of relevant work experience.
Experience with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, and UCIE.
Proven track record of delivering high bandwidth datapath blocks like data movers, protocol adaptors, network-on-chip, arbiters, and schedulers.
Deep understanding of ASIC design flows and methodology.
Strong analytical and interpersonal skills.

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