Senior Digital Design Engineer, High-Speed I/O and Photonics

Nvidia

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: Santa Clara, CA
Salary: $136,000–$218,500 / yr
Posted: 95 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $192k

This role $177k

$126k most similar roles pay here $228k

This role pays less than 53% of similar roles. Most pay $166,912–$216,250 — the shaded band above. At the midpoint, this role pays about $177k versus about $192k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior Digital Design Engineer, High-Speed I/O and Photonics

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Senior Digital Design Engineer - High-Speed I/O and Photonics joins the mixed-signal high-speed I/O group to develop innovative PHY designs for copper and fiber channels supporting NVLINK, Ethernet, and InfiniBand protocols. The role involves front-end development of high-speed DSPs and silicon photonics IPs, including defining micro-architecture specifications, calibration algorithms, and RTL designs. Backend responsibilities include building synthesis constraints and driving timing closure while evaluating PPA trade-offs. Post-silicon tasks involve silicon bring-up, debugging scripts, characterization, and performance tuning. Candidates must possess a degree in Electrical Engineering and experience with Verilog or SystemVerilog, logic design, UVM verification methodologies, and static timing analysis. Preferred expertise includes SerDes architecture, optical transceiver components like modulators and detectors, and knowledge of communication protocols such as PCIe and USB to solve complex wireline communication challenges.

Skills

Verilog System Verilog RTL UVM SerDes Ethernet InfiniBand PCIe USB Silicon Photonics Static Timing Analysis Synthesis Firmware Co-Packaged Optics CDR DFE CTLE

What you'll do

Develop high-speed DSPs, silicon photonics IPs, and chips for advanced networking applications.
Define chip-level features, programming models, and application interface specifications.
Create micro-architecture specifications, calibration algorithms, and adaptation logic with analog designers and architects.
Translate architectural specifications into RTL and firmware designs.
Define synthesis constraints and drive timing closure during the backend design process.
Evaluate PPA trade-offs based on synthesis and physical design feedback to optimize products.
Perform silicon bring-up, including debugging, characterization, performance tuning, and production testing.
Develop testing scripts for post-silicon validation and cross-functional production support.

What we're looking for

B.S. or M.S. degree in Electrical Engineering or equivalent experience.
5+ years of experience in high-speed digital design.
Proficiency with front-end design flow and tools.
Deep understanding of Verilog, System Verilog, logic design concepts, and typical structures.
Understanding of design for test, timing constraints, and static timing analysis.
Experience with industry verification methodologies such as UVM.
Knowledge of optical transceiver devices, SerDes architecture, and physical layer communication protocols like Ethernet or InfiniBand.
Familiarity with mixed-signal circuit design concepts and behavior modeling.

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