Senior Digital Design Engineer, High-Speed I/O and Photonics

Nvidia

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Employment
Full-time
Posted
141 days ago
Freshness
Confirmed live yesterday

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $189k
This role $177k
$126k $228k
below market most similar roles pay here above market

This role pays less than 56% of similar roles. Most pay $162,557–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $189k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Digital Design Engineer, High-Speed I/O and Photonics

The Senior Digital Design Engineer - High-Speed I/O and Photonics joins the mixed-signal high-speed I/O group to develop innovative PHY designs for copper and fiber channels. This role involves frontend development of high-speed DSPs, silicon photonics IPs, and chips, including defining micro-architecture specifications, calibration algorithms, and programming models. Responsibilities extend to backend design tasks like synthesis constraints and timing closure, as well as post-silicon silicon bring-up, testing scripts, and performance tuning. Candidates must possess a degree in Electrical Engineering and experience with Verilog, SystemVerilog, and UVM. The work focuses on high-performance interconnect protocols like NVLINK, Ethernet, and InfiniBand, specifically addressing wireline communication limits and Co-Packaged Optics for AI systems. Technical expertise in SerDes architecture, CDR, DFE, and CTLE is also highly valued.

What you'll do

  • Develop high-speed DSPs, silicon photonics IPs, and chips for frontend development.
  • Define chip-level features, programming models, and application interface specifications.
  • Create micro-architecture specifications, calibration algorithms, and adaptation algorithms.
  • Define synthesis constraints and drive timing closure for backend design.
  • Evaluate PPA trade-offs based on synthesis and P&R feedback.
  • Participate in silicon bring-up and build testing scripts for debugging and characterization.
  • Perform performance tuning and production support for new silicon.

What we're looking for

  • B.S. or M.S. degree in Electrical Engineering or equivalent experience.
  • 5+ years of experience in high-speed digital design.
  • Proficiency with front-end design flow and tools.
  • Deep understanding of Verilog or System Verilog, logic design concepts, and typical structures.
  • Good understanding of design for test, timing constraints, and static timing analysis.
  • Experience with industry verification methodologies, such as UVM.
  • Knowledge of optical transceiver devices and integrated components such as modulators, detectors, and TIAs (preferred).
  • Experience with SerDes architecture, building blocks, and mixed-signal circuit design concepts (preferred).

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