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PCB CAD Altium Electrical Engineering Analog Circuit Design Digital Circuit Design Signal Integrity Analysis High-Speed PCB Design EMI/EMC Testing DFM/DFA IPC Standards Manufacturing Processes Quality Control Project Management Version Control Documentation Tools +11 more Show less

SDN NFV SDWAN WAN Cloud Networking Secure Access Service Edge Network Security NG Firewalls Identity and Access Management Automation Scripts CI/CD Release Management Documentation Tools +8 more Show less

AWS GCP AliCloud IAM VPCs security groups firewall rules KMS policy-as-code AWS Service Control Policies GCP Organization Policy Constraints AliCloud Control Policies Python Java Go Swift Kubernetes EKS GKE Lambda Cloud Functions CI/CD +17 more Show less

Verilog SystemVerilog Python Perl C++ CAD VLSI ComputerArchitecture ChipFloorplan PowerClockDistribution Packaging P&R TimingClosure +8 more Show less

SPICE Python Kubernetes Terraform Docker CI/CD Prometheus Grafana PostgreSQL Git VLSI RTL Physical_Design Clocking_Solutions HDL Verilog SystemVerilog Cadence Synopsys Calibre +15 more Show less

Cadence MATLAB SPICE Verilog VHDL CMOS FinFET ASIC BCD Python C++ SystemVerilog AMS PLL DataConverters ClassDAudioAmplifier BuckBoostSwitchingRegulators ChargePumps PrecisionReferences SensorSignalAcquisitionCircuit AudioAmplifiers +16 more Show less

Verilog Python Perl Unix/Linux Makefiles CI/CD +1 more Show less

Cadence_Virtuoso Python Linux Verilog SystemVerilog Analog-to-Digital_Converters Digital-to-Analog_Converters Phase-Locked_Loops RF_Components Cryogenic_Circuit_Design Low_Temperature_Measurements Semiconductor_Behavior ASIC_Bring-Up Characterization Signal_Integrity Documentation +11 more Show less

SystemVerilog UVM Python Perl C++ VHDL Verilog SystemC AI ML GenAI 4G/5G 3GPP Formal verification Simulation acceleration Unix/Linux Makefiles XML OOP HW/SW co-verification +15 more Show less

Verilog SystemVerilog Vivado Quartus Diamond Xilinx Altera Lattice I2C SPI JTAG PCIE USB Ethernet Encryption Python Perl FPGA CPLD ASIC RTL DFT SI Schematics Layout CI/CD +21 more Show less

React TypeScript Node.js Python LLMs Diffusion models Vector databases RAG Figma MCP CI/CD +6 more Show less

Cadence ADE MATLAB SPICE Verilog VHDL Python PostgreSQL Kubernetes AWS Terraform CI/CD Git JIRA Confluence Prometheus Grafana +11 more Show less

Mentor_Xpedition Mentor_PADS Cadence_Allegro Valor CAM350 IPC_specifications MIPI SERDES QLINK DDR5x_PCIE GB_ethernet DFM DFA IDF_EMN CAD_tools +10 more Show less

Python Dassault Cadence PTC Data Analytics PLM Migrations NUDD Risk Management Modern Data Visualization Tools ECAD MCAD Integration CAD Administration API Integrations Advanced Reporting Tools Custom Utilities Enterprise-Level Engineering Tools +12 more Show less

ISO_13485 GMP FDA ICH USP EP JP_compendia combination_product_regulations Instron ZebraSci Computrac plunger_movement_chambers electronic_lab_notebook project_management CI/CD regulatory_submission quality_systems +12 more Show less

Python C C++ Verilog System Verilog Unix/Linux Shell scripting Makefiles XML RTL coding Synthesis Clock domain crossing Low power design Verification +9 more Show less

Python PyTorch TensorFlow CADENCE Virtuoso ADS RFIC Analog IC Design Machine Learning Simulation ASIC_design Verilog Circuit_topology_analysis Transistor_level_design Wireless_applications 4G 5G WLAN BT GPS +15 more Show less

JavaScript React Node.js CSS HTML Figma Sketch Adobe XD Git Agile Design Systems UI/UX Design Prototyping Web Development APIs RESTful APIs JSON GraphQL CI/CD +14 more Show less

RTL SystemVerilog C/C++ SystemC Verilog Synthesis Lint Clock Domain Crossing Low Power Design Verification Wireless Modem ASICs DSP Communication Systems 4G/5G 3GPP Physical Layer Standards Generative AI ML Agentic-AI Automation Unix/Linux Shell Scripting Python Perl Makefiles XML +17 more Show less

Verilog VHDL Perl Python Waveform debugging tools Simulators Instruction fetch and decode Branch prediction Instruction scheduling Register renaming Out-of-order execution Integer execution Floating point execution Load/store execution Prefetching Cache subsystems Memory subsystems Logic design principles Timing analysis Power analysis Low power techniques High performance techniques +17 more Show less