Modem HW Design Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CASanta Clara, CABoxborough, MA
Salary
$218,800–$328,200 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $189k
This role $274k
$129k $350k
below market most similar roles pay here above market

This role pays more than 97% of similar roles. Most pay $162,000–$216,696 — the blue band above. At the midpoint, this role pays about $274k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Modem HW Design Engineer

Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development joins the Modem Technologies engineering group to focus on advanced design methodologies. The role involves defining specifications and architecture, developing RTL, and optimizing for area, power, and performance to deliver first-time-right silicon. You will collaborate with verification, modeling, and physical implementation teams while engaging with system, RF, firmware, and software groups. Key technical requirements include expertise in RTL coding, Verilog, SystemVerilog, C/C++, and SystemC. You must possess skills in synthesis, LINT, clock domain crossing, and low power design. The work involves wireless modem ASICs, DSP applications, and 4G/5G 3GPP physical layer standards using 4nm and below CMOS technology. Additionally, the role utilizes Generative AI, ML, and agentic-AI automation frameworks alongside Python, Perl, and Unix/Linux shell scripting.

What you'll do

  • Define specifications and architecture for next-generation modem hardware.
  • Develop RTL for wireless modem ASICs and custom datapath components.
  • Optimize hardware designs for area, power, and performance.
  • Implement GenAI, ML, and agentic-AI automation frameworks to accelerate project phases.
  • Perform synthesis, LINT, clock domain crossing, and low-power design verification.
  • Deliver first-time-right silicon by coordinating with system, RF, firmware, and software teams.
  • Write scripts using Python, Perl, and Unix/Linux shell for design automation.

What we're looking for

  • Bachelor's degree in a related field and 6+ years of engineering experience, or a Master's and 5+ years, or a PhD and 4+ years.
  • Strong expertise in RTL coding and logic design for wireless modem ASICs or custom datapath components for DSP applications (preferred).
  • Solid understanding of Verilog, SystemVerilog, C/C++, and SystemC (preferred).
  • Experience with synthesis, industry LINT, clock domain crossing, low power design, and verification (preferred).
  • Background in wireless/wireline modem technology, DSP, or communication systems (preferred).
  • Knowledge of 4G/5G 3GPP physical layer standards (preferred).
  • Experience with ultra-deep sub-micron CMOS technology nodes such as 4nm and below (preferred).
  • Experience with Generative AI, ML, or agentic-AI-based automation (preferred).

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