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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics

Remote (San Jose, CA) 21 days ago $151,000–$251,800
Actively hiring Confirmed live yesterday High trust Competitive pay
RTL Verilog VHDL AMBA CHI ACE AXI ASIC Design Flow Logic Synthesis DFT STA ECO Python Perl Memory Controller Cache Design Coherent Interconnect
10+ yrs exp Remote
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Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

Nvidia

Santa Clara, CA +1 32 days ago $136,000–$218,500
Actively hiring Confirmed live 2 days ago High trust Competitive pay
Physical Design Synthesis Timing Analysis Floor-planning Verilog ASIC Design Flow RTL Design Verification DFT ECO High-frequency Design Micro-architecture
5+ yrs exp
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Senior Design Engineer, Coherent High Speed Interconnect

Nvidia

Santa Clara, CA 51 days ago $168,000–$264,500
Actively hiring Confirmed live yesterday High trust Above market
Verilog System Verilog RTL Design PCIe CXL AXI CHI SerDes DDR LPDDR Link Layer Physical Layer Power Optimization Performance Analysis Chiplets NVLINK-C2C
8+ yrs exp Hybrid
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Senior Logic Design Engineer, Cache Coherent Interconnects

Nvidia

Santa Clara, CA +1 177 days ago $136,000–$218,500
Actively hiring Confirmed live yesterday Trusted Competitive pay
Verilog RTL ASIC Design Flow Logic Synthesis Timing Closure Computer Architecture Cache Coherency high speed interconnects DFT Floor-planning ECO Lab Debug
5+ yrs exp Hybrid
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