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Active Keyword: High Remove filter Location: San Diego Remove filter Clear all

7 of up to 20 (filtered)

ASIC/RTL Design Engineer for High-speed Interfaces

Qualcomm

San Diego, CA 3 days ago $140,000–$210,000
Actively hiring Confirmed live yesterday Posted this week High trust Below market
RTL ASIC Design SerDes DDR PCIe USB UFS MIPI VCS Fusion Compiler PrimeTime Power Compiler Spyglass Python Perl DFT STA CDC GDSII
4+ yrs exp
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High-Speed HBM, LPDDR Memory Controller ASIC Digital Design Engineer

Qualcomm

San Diego, CA 8 days ago $140,000–$229,800
Actively hiring Confirmed live yesterday High trust Competitive pay
ASIC Design RTL Coding Digital Design HBM LPDDR DDR NoC SRAM Cache Controller x86 ARM Gate Level Simulation Synthesis Timing Closure Power Analysis Hardware Architecture
4+ yrs exp
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High-speed Electrical/Optical Post-Silicon Engineer

Qualcomm

San Diego, CA 21 days ago $192,000–$288,000
Actively hiring Confirmed live 2 days ago High trust Above market
SerDes SI/PI PDN Oscilloscope BERT TDR Spectrum Analyzer Python C C++ Java Linux UEFI PCIe CXL Ethernet UCIe PAM4 S-parameters
8+ yrs exp
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High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer

Qualcomm

San Diego, CA 30 days ago $140,000–$210,000
Actively hiring Confirmed live yesterday Trusted Below market
ASIC Design RTL Coding HBM LPDDR DDR NoC SRAM Cache Controller x86 ARM Synthesis Timing Closure Gate Level Simulation Power Analysis Digital Design Hardware Architecture
4+ yrs exp
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High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer

Qualcomm

San Diego, CA 37 days ago $140,000–$210,000
Actively hiring Confirmed live 2 days ago Trusted Below market
ASIC Design RTL Coding HBM LPDDR DDR NoC SRAM Cache Controller x86 ARM Synthesis Timing Closure Gate Level Simulation Power Analysis Digital Design Hardware Architecture
4+ yrs exp
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Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer

Qualcomm

San Diego, CA 43 days ago $140,000–$210,000
Actively hiring Confirmed live 2 days ago Low trust Below market
Verilog SystemVerilog ASIC Design RTL Synopsys Synthesis Low Power Design Computer Architecture C C++ Python Design Verification SOC Interconnects Memory Subsystems
4+ yrs exp
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Principal PCB Engineer, Datacenter / High-Speed Systems

Qualcomm

San Diego, CA 73 days ago $201,600–$302,400
Actively hiring Confirmed live yesterday High trust Above market
PCB Design SI/PI DFM NPI High-Speed Design HDI mSAP Root Cause Analysis CAPA Advanced Packaging SiP Substrate Engineering Low-loss Materials
8+ yrs exp
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