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Active Keyword: IC Design Engineer Remove filter Location: Fort Collins Remove filter Clear all

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IC Design Engineer

Broadcom

Fort Collins, CO 7 days ago $61,900–$99,000
Actively hiring Confirmed live today Posted this week High trust Below market
ASIC Design Physical Design VLSI Place&Route Verilog DRC LVS STA Tcl Perl Python UNIX Linux DSP EDA Tools
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ASIC Package Design Engineer

Broadcom

San Jose, CA +2 8 days ago $143,800–$230,000
Actively hiring Confirmed live today High trust Competitive pay
IC Package Design Flip-chip BGA ASIC SerDes Signal Integrity Power Integrity HBM DDR5 Cadence APD Allegro Package Designer Cadence SKILL Physical Design Layout RF Microwave ADC DAC
10+ yrs exp
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Analog and Mixed-Signal IC Design Engineer

Broadcom

Fort Collins, CO 22 days ago $109,700–$175,500
Actively hiring Confirmed live today High trust Below market
Analog Design CMOS Cadence Virtuoso Cadence Analog Artist Layout Design ATE Bench Testing Post-Silicon Evaluation Buck Converters ADCs DACs OpAmps BCD Technologies Extraction
8+ yrs exp
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CPU Microarchitecture & Cache RTL Design Engineer

Amd

Fort Collins, CO 34 days ago $144,800–$217,200
Actively hiring Confirmed live today High trust Below market
VLSI RTL Design Verilog HDL Cache Architecture CPU Coherency NoC SoC Scripting Microarchitecture Timing Closure Design for Test Physical Design Routing Fabric
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ASIC Design Automation Engineer

Broadcom

Fort Collins, CO 48 days ago $129,400–$207,000
Actively hiring Confirmed live today High trust Below market
Python C++ Tcl Ruby Perl Verilog HDL UNIX Linux Digital Logic Design Static Timing Analysis Data Structures OO Design IC Design Synthesis Verification
10+ yrs exp
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Hardware Design Verification Engineering Intern/Co-op

Amd

Austin, TX +6 67 days ago $79,872–$119,808
Actively hiring Confirmed live today Low trust Below market
system Verilog Verilog Python C++ Perl UVM C Shell MySQL PHP Linux Unix Windows Hardware Design Verification Digital Systems Computer Organization Logic Design HDL Oscilloscopes Logic Analyzers
Hybrid
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Hardware Design Verification Engineering Intern/Co-Op

Amd

Austin, TX +6 67 days ago $59,072–$88,608
Actively hiring Confirmed live today Low trust Below market
system Verilog Verilog UVM Python C++ C Perl Shell MySQL PHP Linux Unix Windows Hardware Design Verification Digital Systems Computer Organization Logic Design HDL Oscilloscopes Logic Analyzers Multimeters
Hybrid
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Microprocessor VLSI Physical Design Engineer

Amd

Fort Collins, CO 84 days ago $144,800–$217,200
Actively hiring Confirmed live yesterday High trust Competitive pay
VLSI Physical Design FinFET Verilog RTL Computer Architecture Clock Tree Synthesis Static Timing Analysis Physical Verification Sign Off IR Drop Analysis Parasitic Extraction Floor planning Perl C Tcl SRAM Digital Circuits
Hybrid
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Design Verification Engineer

Broadcom

Broomfield, CO +4 84 days ago $143,800–$230,000
Actively hiring Confirmed live today High trust Competitive pay
SystemVerilog UVM SVA RTL Gate-level Netlist Python Perl Tcl FPGA Emulation Synopsys Cadence Mentor Git DesignSync Mixed-Signal SDF Co-simulation
10+ yrs exp
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Senior Microprocessor VLSI Physical Design Engineer

Amd

Fort Collins, CO 119 days ago $178,400–$267,600
Actively hiring Confirmed live yesterday High trust Above market
VLSI Physical Design Verilog RTL Static Timing Analysis Clock Tree Synthesis Floor planning Placement Routing Parasitic Extraction IR drop analysis Electromigration Physical Verification Sign Off Perl C Tcl Computer Architecture SRAM Digital Circuits
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