IC Design Engineer

Broadcom

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Fort Collins, CO
Salary
$61,900–$99,000 / yr
Employment
Full-time
Posted
7 days ago
Freshness
Confirmed live today
Closes
Apr 18, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $196k
This role $80k
$42k $250k
below market most similar roles pay here above market

This role pays less than 99% of similar roles. Most pay $162,000–$229,650 — the blue band above. At the midpoint, this role pays about $80k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 280 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 169 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · IC Design Engineer

The IC Design Engineer will join the R&D Design Engineering team to focus on the design and physical implementation of high performance System-On-Chip ASICs. The role involves managing customer relationships while providing technical support and performing hands-on physical design implementation for large scale integrated circuits with multi-100 million gates complexity. You will utilize commercial and in-house EDA tools to develop designs in 5nm or smaller advanced process nodes. Key responsibilities include participating in innovation, design flow, and methodology development for AI, computing, and networking products. Required technical skills include proficiency in Place&Route, Verilog simulation, DRC/LVS verification, and Static Timing Analysis. Candidates must be skilled in Tcl, Perl, and Python scripting languages within a UNIX/Linux environment to solve deep submicron process challenges.

What you'll do

  • Design and physically implement high-performance System-On-Chip ASICs with multi-100 million gate complexity.
  • Utilize commercial and in-house EDA tools for 5nm or smaller advanced process nodes.
  • Perform Place&Route, Verilog simulation, DRC/LVS verification, and Static Timing Analysis (STA).
  • Develop design flows and methodologies to address deep submicron process challenges.
  • Provide technical support and manage working relationships with customers.
  • Write scripts using Tcl, Perl, or Python to support the design and implementation process.
  • Contribute to the design of state-of-the-art ASICs for AI, computing, and networking products.

What we're looking for

  • Bachelor's degree in Electrical or Electronic Engineering.
  • Experience in digital physical design implementation of large-scale ASICs with multi-100 million gates complexity.
  • Demonstrated ability to provide technical support and manage customer working relationships.
  • Hands-on competency using leading-edge physical design EDA tools for projects.
  • Familiarity with VLSI design tools for Place&Route, Verilog simulation, DRC/LVS verification, and Timing analysis (STA).
  • Proficiency in scripting languages such as Tcl, Perl, or Python.
  • Proficiency in UNIX/Linux environments.
  • In-depth CPU/DSP architecture/algorithm knowledge and related physical design implementation knowledge (preferred).

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