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Swift SwiftUI UIKit TypeScript JavaScript HTML CSS React Git CI/CD TestFlight Machine Learning Core Animation Core Graphics Metal +10 more Show less

PCB Layout Allegro FPGA Verilog VHDL Python Lua C C++ USB 3.2 USB-PD Display Port PCIe I2C SPI DFT Data Analysis +12 more Show less

C C++ Objective-C Digital Signal Processing DSP Control Systems Test Automation Circuit Analysis Electromechanical Systems Root Cause Analysis NPI Modeling Simulations Algorithms +9 more Show less

Digital Design Mixed Signal FPGA Silicon Bring-up Characterization Debug MIPI SoundWire I2S SPMI Audio Amplifier Codec Power Converters Micro-architecture Emulation Verification Validation +12 more Show less

System Verilog UVM C C++ Python Perl EDA Tools Digital Design Computer Architecture ASIC High-speed Interface Protocols Simulation Regression Analysis Functional Coverage Constrained Random Verification +10 more Show less

Layout Digital Design Signal Integrity Power Integrity RF SoC Integration Embedded Systems Oscilloscopes Spectrum Analyzers Frequency Counters Manufacturing Test +6 more Show less

RTL Verilog SystemVerilog ASIC Design Synthesis Timing Closure CDC RDC UPF AMBA AXI AHB APB Cryptography Low-Power Design Lint Netlist Hardware Security +13 more Show less

SystemVerilog RTL Design ASIC Design Synthesis Timing Analysis Power Optimization Formal Verification CDC RDC PPA Micro-architecture Digital Design +7 more Show less

Schematic Capture Circuit Design FPGA CPLD Signal Integrity Verilog VHDL Python Perl Tcl Spectrum Analyzers Protocol Analyzers Test Automation +8 more Show less

Schematic Capture Circuit Design FPGA CPLD Board Bring-up Signal Integrity Verilog VHDL Python Perl Tcl Spectrum Analyzers Protocol Analyzers Digital Logic +9 more Show less

EMC ESD RF Signal Integrity Power Integrity CST HFSS ADS Matlab CAD Vector Network Analyzers Oscilloscopes Transmission Line Pulsers Test Automation EN55032 EN55035 IEC61000 ETSI 301 489 +13 more Show less

ASIC Design SoC Design Power Management Microarchitecture Logic Design Lint CDC Synthesis ECO STA Physical Design Python Perl TCL Asynchronous Interfaces +10 more Show less

ASIC Design SoC Design Power Management Microarchitecture Logic Design Lint CDC Synthesis ECO STA Physical Design Perl Python TCL System Architecture +10 more Show less

RTL Verilog SystemVerilog ASIC Design CDC RDC UPF Synthesis Timing Closure AMBA AXI AHB APB Cryptography Low-Power Design Lint Netlist +12 more Show less

RTL Verilog SystemVerilog ASIC Design CDC RDC UPF Synthesis Timing Closure AMBA AXI AHB APB Cryptography Low-power Design Lint Netlist Hardware Security +13 more Show less

Digital Design FPGA Silicon Bring-up Characterization Debug Mixed Signal Design MIPI HDMI TCON Micro-architecture Emulation Verification +7 more Show less

Power Modeling Python Matlab Multimeters Oscilloscopes Logic Analyzers Analog Circuits Power Electronics Data Analysis Control Systems Scripting +6 more Show less

Threat Modeling Security Architecture C C++ Objective-C Swift SDLC OS Internals Code Review Software Security Testing Agentic Coding Tools Mitigation Techniques +7 more Show less

EMC ESD RF Signal Integrity Power Integrity CST HFSS ADS Matlab CAD Vector Network Analyzers Oscilloscopes Transmission Line Pulsers Test Automation EN55032 IEC61000 +11 more Show less

Machine Learning Generative AI PyTorch TensorFlow JAX MLX RAG Verilog SystemVerilog VHDL UVM Static Timing Analysis CDC RDC Deep Neural Networks Reinforcement Learning +11 more Show less