wSoC Design Verification Engineer

What you'll do

• Create coverage-driven verification plans from specifications and refine them to meet target goals.
• Architect highly reusable UVM-based testbenches and integrate complex multi-instance VIPs into the SoC level.
• Perform pre-silicon RTL verification for both individual blocks and top-level SoC designs.
• Execute power management verification using low-power methodologies and UPF simulations.
• Verify high-speed protocols including PCIe, DDR, USB, and various bus architectures like AXI and AHB.
• Validate firmware-hardware interactions and complex multi-chip SoC debug architectures.
• Collaborate with architecture and software teams to integrate and verify overall SoC designs.
• Work with methodology architects to improve and optimize the verification flow.

What we're looking for

• Bachelor of Science in Electrical Engineering or equivalent degree.
• Dedicated and hands-on ASIC Design Verification experience (preferred).
• Advanced knowledge of HVL methodology, specifically UVM (preferred).
• Experience with formal verification (preferred).
• Proven track record of working a full ASIC cycle from concept to tape-out (preferred).
• Experience taping out large SoC systems with embedded processor cores (preferred).
• Hands-on experience verifying PCIe, Bus Fabric, NOC, AHB, and AXI architectures in UVM environments (preferred).
• Knowledge of low power design, UPF integration, and HW/FW interaction verification (preferred).