System FPGA Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TXFolsom, CAHillsboro, ORSan Diego, CA
Salary
$151,800–$227,800 / yr
Posted
56 days ago
Freshness
Confirmed live yesterday
Closes
Jan 13, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $180k
This role $190k
$132k most similar roles pay here $238k

This role pays more than 60% of similar roles. Most pay $150,374–$208,825 — the shaded band above. At the midpoint, this role pays about $190k versus about $180k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · System FPGA Engineer

System FPGA Engineer As a Staff / Sr. Staff System FPGA Engineer, you will join the systems engineering team to implement defined FPGA architectures for control-plane and telemetry systems on next-generation server reference platforms. You will work with cross-functional teams to translate specifications into synthesizable HDL, perform synthesis, place-and-route, and timing closure using vendor toolchains. Your daily responsibilities include developing test benches, executing verification plans, and performing lab bring-up using JTAG, logic analyzers, and oscilloscopes. The role requires proficiency in Verilog, SystemVerilog, and Python for design automation and cocotb test benches. You will manage source-controlled designs via git and GitHub while ensuring high standards for RTL quality. Key technical requirements include experience with I2C, UART, AXI4, PCIe, DDR5, and high-speed interfaces like SerDes to solve complex hardware integration challenges in server environments.

What you'll do

  • Translate system specifications into synthesizable HDL for control-plane and telemetry systems on server platforms.
  • Develop and execute test benches and verification plans using industry-standard tools and cocotb.
  • Perform FPGA synthesis, place-and-route, and timing closure using vendor-specific toolchains.
  • Test and debug FPGA designs in the lab using JTAG, logic analyzers, and oscilloscopes.
  • Create Python scripts to automate design workflows, regression testing, and verification infrastructure.
  • Identify architectural concerns and provide feedback to engineers when implementation reveals specification issues.
  • Maintain source-controlled design repositories while participating in peer code reviews for RTL quality.
  • Produce technical documentation covering implementation details, test results, and known system issues.

What we're looking for

  • Bachelor's degree in Engineering or Computer Science with 4+ years of experience, Master's with 3+ years, or PhD with 2+ years.
  • 5+ years of experience in FPGA implementation and verification.
  • Proficiency in HDL development using Verilog and/or SystemVerilog for simulation, synthesis, and debugging.
  • Proficiency in Python scripting for design automation, test infrastructure, and cocotb test benches.
  • Experience with common interfaces such as I2C, UART, AXI4, PCIe, DDR5, or similar protocols.
  • Working knowledge of git and GitHub for version control and CI/CD workflows.
  • Hands-on experience with FPGA development tools, hardware bring-up, and timing closure.
  • Strong communication skills to document findings and collaborate with cross-functional teams.

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