Staff Hardware Design Engineer, SoC/SIP

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: San Diego, CAAustin, TX
Salary: $134,800–$202,200 / yr
Posted: 45 days ago
Freshness: Confirmed live yesterday
Closes: Jan 24, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $195k

This role $168k

$123k most similar roles pay here $241k

This role pays less than 74% of similar roles. Most pay $168,500–$222,250 — the shaded band above. At the midpoint, this role pays about $168k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Staff Hardware Design Engineer, SoC/SIP

Role Posting Log in to save

Staff Hardware Design Engineer, SoC/SIP joins the Data Center AI Hardware Engineering team to develop motherboards, add-in cards, and modules for new AI System on Chip and System in Package technologies. The role involves leading schematic designs, PCB layouts, component selections, and thermal management while collaborating with cross-functional teams and ODMs to move projects from concept to production. Key responsibilities include developing functional specifications for rack-level architectures, managing power delivery, and overseeing manufacturing processes. Candidates must possess expertise in high-speed interfaces like PCIe Gen5/6 and 400GbE, as well as experience with LPDDR4x memory and signal integrity analysis. Required skills include proficiency in Cadence Allegro or Mentor Expedition, SPICE simulation tools, and lab equipment such as oscilloscopes and logic analyzers to resolve complex hardware issues across system, card, and rack-level configurations.

Skills

PCB Design Cadence Allegro Mentor Expedition Signal Integrity Power Integrity PCIe Gen5/6 LPDDR4x/5x DDR4/5 Ethernet JTAG SPICE x86 ARM BMC SMBus PMBus SPI PWM Oscilloscopes Logic Analyzers Circuit Simulation

What you'll do

Lead schematic design, PCB layouts, component selection, and the development of test plans for AI hardware.
Co-develop functional specifications for systems, cards, sub-systems, and rack-level architectures.
Support architecture and card designs including accelerator SoCs, memory, I/O, and power delivery.
Resolve technical design issues across system, card, and rack levels to ensure performance goals.
Perform bring-up and debugging of hardware systems, cards, and rack-level configurations.
Provide technical oversight of factory manufacturing processes to ensure quality and consistency.
Coordinate with ODMs and JDM partners to manage product requirements and technical milestones.
Deliver technical training for ODMs regarding rack-level system integration and deployment.

What we're looking for

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with 4+ years of experience.
Master's degree in Computer Science, Electrical/Electronics Engineering, or a related field with 3+ years of experience.
PhD in Computer Science, Electrical/Electronics Engineering, or a related field with 2+ years of experience.
Experience in system, card, and rack-level development including architecture, design, validation, and deployment of enterprise hardware.
Expertise in high-speed interfaces (PCIe Gen5/6, LPDDR4x/5x, DDR4/5) and signal integrity for long PCB or cable topologies.
Proficiency in schematic capture and PCB layout tools such as Cadence Allegro or Mentor Expedition.
Experience with hardware measurement instruments including oscilloscopes, logic analyzers, and JTAG debug tools.
Knowledge of rack-level infrastructure including power delivery (PDUs, VRMs), thermal management, and mechanical constraints.

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