Senior Physical Design and Timing Engineer
Nvidia
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How this pay compares to similar roles
This role pays less than 57% of similar roles. Most pay $176,215–$222,000 — the shaded band above. At the midpoint, this role pays about $189k versus about $199k for comparable roles.
Based on 240 similar postings.
Employer
Samsung Electronics is a South Korean multinational corporation and a global leader in technology, specializing in consumer electronics, semiconductors, and home appliances.
Samsung Electronics currently has 94 open roles on FindRole.
Listed pay typically runs $106,000–$174,500 across 58 roles with salary data.
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At a glance
As a Staff Engineer, Static Timing Analysis CAD Engineer, you will join the Advanced Design Technology and Design Implementation team to ensure timing integrity and signoff readiness for next-generation GPU IPs used in premium smartphones and other market segments. You will collaborate with design execution teams and EDA partners to develop automation, methodologies, and scalable solutions for complex advanced node designs. Your daily work involves implementing tools for timing analysis, managing multi-corner analysis, and addressing low-power constraints. The role requires expertise in ASIC design flows, LLE, POCV, and clock tree synthesis. You will utilize industry-standard tools such as PrimeTime, StarRC, PrimeClosure, and Tempus while leveraging scripting skills in Tcl, Python, Perl, and Shell. Your work addresses the technical challenge of achieving high-quality timing closure across functional and test modes for advanced semiconductor technology.
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