Staff Engineer, Serdes Analog Design

Samsung Semiconductor

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Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$163,000–$253,000 / yr
Posted
2 days ago
Freshness
Confirmed live today

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Competitive pay

How this pay compares to similar roles

Similar $205k
This role $208k
$152k most similar roles pay here $264k

This role pays more than 50% of similar roles. Most pay $177,250–$233,400 — the shaded band above. At the midpoint, this role pays about $208k versus about $205k for comparable roles.

Based on 240 similar postings.

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About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 36 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 36 roles with salary data.

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At a glance

TL;DR · Staff Engineer, Serdes Analog Design

Staff Engineer, Serdes Analog Design will join the team to work on the architecture and circuits of high-speed interconnect transceivers. The role involves designing low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies. Key responsibilities include translating design specifications into schematics, building simulation test-benches to evaluate performance and reliability, supervising layout designers for LVS/DRC clean layouts, and performing functionality validation in silicon. The candidate will work on Serdes IPs, clock generation, display interfaces, camera sensor interfaces, UCIe die-to-die interconnects, and high-speed Ethernet links. Required expertise includes experience with bandgap, LDO, filters, CTLE, DFE, FFE, and PLL circuits. Technical proficiency is required in EDA tools such as Cadence, Spectre, Totem, and EMX, along with scripting skills in Python or Matlab to support the development of high-performance Serdes solutions.

What does a Engineer earn in California?

Median $209800 from 103 postings across 28 companies.

See salary data

What you'll do

  • Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies.
  • Develop high-performance, low-power Serdes including display interfaces, camera sensor interfaces, and UCIe die-to-die interconnects.
  • Translate component design specifications into detailed schematics for various circuit types.
  • Build simulation test-benches to evaluate circuit performance, functionality, power consumption, and reliability.
  • Supervise layout designers to ensure LVS/DRC clean layouts and optimize for power and performance.
  • Perform functionality and performance validation in silicon.
  • Develop circuits for Serdes IPs, clock generation, and traditional analog components like bandgaps and LDOs.

What we're looking for

  • Bachelor's degree with 10+ years, Master's with 8+ years, or PhD with 5+ years of experience.
  • Minimum 2 years of experience in RF, Analog, and Serdes SoC design.
  • Knowledge and experience with analog and mixed-signal circuits such as bandgap, LDO, and filters.
  • Knowledge and experience with Serdes IP components including CTLE, DFE, FFE, clock distributions, PI, and IQ generation.
  • Knowledge of Serdes architecture and high-speed interconnect standards like USB, PCIe, and UCIe.
  • Proficiency in EDA tools such as Cadence, Spectre, Totem, and EMX.
  • Proficiency with scripting languages including Python and Matlab.
  • Experience with ESD, PLL, clock generation, ADC, and DAC is a big plus (preferred).

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