SerDes Circuit Design Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Waltham, MA
Salary
$116,400–$203,000 / yr
Posted
17 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $204k
This role $160k
$99k most similar roles pay here $276k

This role pays less than 79% of similar roles. Most pay $166,500–$241,750 — the shaded band above. At the midpoint, this role pays about $160k versus about $204k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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At a glance

TL;DR · SerDes Circuit Design Engineer

The SerDes Circuit Design Engineer joins the high-speed SerDes team to develop next-generation, high-performance wireline transceivers and system-on-chip intellectual property. In this role, you will collaborate with cross-functional teams to design and execute state-of-the-art analog mixed-signal circuits for SerDes PHYs. Daily responsibilities include evaluating circuit topologies for Rx, CDR, Tx, bias generators, high-speed clock generation, and low-jitter distribution while optimizing for power, performance, and area. You will perform transistor-level implementation, behavioral modeling, and mask design supervision. The role requires expertise in advanced CMOS FinFET technologies, as well as tools like SystemVerilog, Matlab, Python, and VerilogAMS. Key technical domains include high-speed serial links, equalization techniques for 64+ Gbps NRZ and PAM applications, and knowledge of protocols such as PCIe, USB, DP, and MPHY to solve complex wireline communication challenges.

What you'll do

  • Design and evaluate high-performance SerDes PHY circuit topologies including Rx, CDR, Tx, and bias generators.
  • Implement transistor-level designs and behavioral modeling for mixed-signal circuits with optimized power, performance, and area.
  • Develop advanced analog components such as LDO regulators, amplifiers, comparators, and high-speed clock distribution networks.
  • Create block-level specifications and execute mask designs to implement layout views of integrated circuits.
  • Implement digitally assisted analog design techniques including background calibrations and LMS-based adaptive loops.
  • Design equalization circuits like CTLE and DFE for 64+ Gbps NRZ and PAM applications.
  • Perform circuit modeling and performance evaluation using tools such as SystemVerilog, Matlab, or Python.
  • Conduct lab testing, debugging, and data analysis for high-speed serial I/O components.

What we're looking for

  • Minimum requirement of a bachelor's degree.
  • Deep understanding of analog mixed-signal design with experience in high-speed serial links (preferred).
  • Experience designing analog mixed-signal circuit blocks such as Bandgap, LDOs, amplifiers, and oscillators (preferred).
  • Understanding of advanced concepts like mismatch mitigation, linearity, stability, and low-power techniques (preferred).
  • Knowledge of digitally assisted analog design, including background calibrations and LMS based adaptive loops (preferred).
  • Experience with high-speed digital circuits and knowledge of Tx/Rx equalization techniques for 64+ Gbps applications (preferred).
  • Experience in AMS circuit modeling using SystemVerilog, Matlab, Python, or VerilogAMS (preferred).
  • Hands-on experience in advanced CMOS technologies, FinFET design, and lab testing of high-speed serial I/O (preferred).

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