Staff Engineer, Physical Design

Samsung Electronics

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$151,000–$226,600 / yr
Employment
Full-time
Posted
10 days ago
Freshness
Confirmed live yesterday
Closes
Nov 30, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $202k
This role $189k
$139k most similar roles pay here $262k

This role pays less than 61% of similar roles. Most pay $175,183–$229,100 — the shaded band above. At the midpoint, this role pays about $189k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Electronics

Samsung Electronics is a South Korean multinational corporation and a global leader in technology, specializing in consumer electronics, semiconductors, and home appliances.

Samsung Electronics currently has 84 open roles on FindRole.

Listed pay typically runs $106,000–$200,250 across 78 roles with salary data.

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At a glance

TL;DR · Staff Engineer, Physical Design

Staff Engineer, Physical Design joins the Advanced Design Technology and Design Implementation team to support the physical implementation and methodology execution of high-performance GPU IP across advanced process nodes. This role involves executing key stages of the physical design flow, including synthesis, floorplanning, placement, routing, and timing closure while focusing on power, performance, and area goals. The engineer will also develop scripts for automation, perform STA-driven optimization, and manage DRC/LVS convergence. Required expertise includes proficiency with Synopsys or Cadence toolsets such as ICC2, Fusion Compiler, Innovus, PrimeTime, Tempus, and StarRC. Candidates must possess strong scripting skills in Python, TCL, Shell, or Perl. The role addresses complex physical design challenges for high-performance computing devices, ensuring silicon quality and optimized performance for next-generation GPU blocks within a sophisticated semiconductor manufacturing environment.

What you'll do

  • Execute physical design flows including synthesis, floorplanning, placement, and routing for high-performance GPU blocks.
  • Optimize power, performance, and area (PPA) goals across advanced process nodes.
  • Perform timing, power, and physical signoff activities including STA-driven optimization and DRC/LVS convergence.
  • Develop scripts and automation in Python, TCL, or Shell to improve design productivity and flow repeatability.
  • Debug tool issues and resolve complex implementation challenges for cutting-edge semiconductor designs.
  • Partner with hardware and system-level teams to adapt physical design flows for advanced technologies.
  • Document analysis results and technical findings while managing moderate-to-complex projects independently.

What we're looking for

  • Bachelor’s degree in Computer Science, Computer Engineering, or related field with 6+ years of experience.
  • Master’s degree with 4+ years of experience.
  • Ph.D. with 2+ years of experience.
  • 2+ years of hands-on experience with physical design implementation flows including synthesis, place-and-route, timing closure, and signoff support.
  • Proficiency with Synopsys or Cadence toolsets such as ICC2/Fusion Compiler, Innovus, PrimeTime/Tempus, or StarRC.
  • Strong scripting and automation skills in Python, TCL, Shell, or Perl.
  • Familiarity with low-power implementation considerations, physical verification tools (Calibre/ICV), and deep submicron design challenges.
  • Applicants must be authorized to access information subject to U.S. export control laws.

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