Physical Design Engineer

What you'll do

• Perform physical design implementation of complex SoC blocks from netlist to tape-out in advanced technology nodes.
• Implement clock and power distribution, including placement of memories and other macros.
• Optimize designs for reduced area, power, and timing convergence while resolving congestion hotspots.
• Conduct analysis tasks including Static Timing Analysis (STA), IR drop, and DRC/LVS checks.
• Develop scripts using TCL, Perl, or Shell to automate processes and analyze design database data.
• Improve physical design methodologies, construction recipes, and flow tools to enhance implementation quality.
• Collaborate with front-end teams to integrate block designs into the higher level of the hierarchy.

What we're looking for

• Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
• 5 years of experience in physical design or a related occupation.
• Experience using EDA tools such as Innovus, IC Compiler, Primetime, or Calibre.
• Experience in synthesis, automated place and route, or verification flows including logic equivalency and low power verification.
• Ability to interpret design constraints for timing convergence and low power verification.
• Proficiency in circuit design techniques like clock gating, power gating, or multi-voltage designs.
• Ability to use hardware descriptive languages to describe the behavior and structure of digital circuits.
• Experience automating processes and data analysis using scripting languages such as Perl, Shell, Makefiles, and TCL.