SRAM Circuit Design Engineer

Apple Inc

Confirmed live yesterday High trust

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Work type
On-site
Location
Austin, TX
Posted
2 days ago
Freshness
Confirmed live yesterday

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How this pay compares to similar roles

Similar $199k
$139k most similar roles pay here $256k

This listing doesn't post a salary. Most similar roles pay $168,200–$229,100.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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TL;DR · SRAM Circuit Design Engineer

As an SRAM Circuit Design Engineer within the Digital Custom Group, you will join a silicon design team focused on developing core components for high-performance chips including CPU, GPU, SoC, and Neural Engine designs. You will be responsible for designing and implementing custom digital circuits for SRAM, defining architectures that optimize for power, timing, area, and yield. Your daily work involves schematic capture, simulations, margin verifications, and functional equivalency modeling while collaborating with layout teams to create optimal GDS. You will also write RTL, validate use-cases, and support post-silicon efforts. Required skills include experience in SoC design cycles for low power and high performance, knowledge of memory hierarchy, nanometer device physics, and leakage mechanisms. Preferred qualifications include machine learning algorithms, scripting, and proficiency with industry-standard design tools to solve complex hardware challenges.

What you'll do

  • Design and implement custom digital circuits specifically for SRAM components.
  • Define architecture and topologies optimized for power, timing, area, and yield.
  • Perform schematic capture, simulations, analysis, and margin verifications.
  • Develop RTL models and verify them against design schematics and use cases.
  • Collaborate with layout teams to create and verify optimal GDS files.
  • Conduct backend verification including IR and EM analysis.
  • Model functional equivalency and Design for Test (DFT) requirements.
  • Support post-silicon efforts to ensure successful productization.

What we're looking for

  • Bachelor's degree and minimum of 3 years of experience.
  • Experience developing circuits and SRAM/Register File for low power, low voltage, and high performance (preferred).
  • Knowledge of Cache design, architecture, and memory hierarchy (preferred).
  • Working knowledge of RTL modeling (preferred).
  • Solid understanding of industry-standard design tools (preferred).
  • Deep understanding of nanometer device physics, leakage mechanisms, and technology interactions with device behavior (preferred).
  • Ability to devise experiments and analyze data for silicon debug (preferred).
  • Knowledge of Machine Learning algorithms and scripting (preferred).

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