SRAM Circuit Design Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $184,700–$324,800 / yr
Posted: 41 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $193k

This role $255k

$132k most similar roles pay here $345k

This role pays more than 95% of similar roles. Most pay $168,000–$217,500 — the shaded band above. At the midpoint, this role pays about $255k versus about $193k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · SRAM Circuit Design Engineer

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As an SRAM Circuit Design Engineer within the Digital Custom Group, you will join a silicon design team focused on developing high-performance components for flagship products including CPUs, GPUs, and SoCs. You will be responsible for designing and implementing custom digital circuits for SRAM, defining architectures that optimize for power, timing, area, and yield. Your daily work involves schematic capture, simulation, margin verification, RTL modeling, and backend verification like IR/EM analysis. You will collaborate with architecture teams to formulate specifications and work with layout teams to create optimal GDS. The role requires expertise in nanometer device physics, leakage mechanisms, and memory hierarchy. Candidates should possess skills in scripting, machine learning algorithms, and experience with SoC design cycles for low power and high performance environments while ensuring functional equivalency and DFT modeling.

Skills

SRAM Circuit Design RTL SoC GDS DFT IR/EM Machine Learning Scripting Memory Hierarchy Cache Design Schematic Capture Silicon Debug Nanometer Device Physics

What you'll do

Design and implement custom digital circuits specifically for SRAM design.
Define architecture and topologies optimized for power, timing, area, and yield.
Perform schematic capture, simulations, analysis, and margin verifications.
Develop RTL models and verify use-cases against design schematics.
Collaborate with layout teams to create optimal GDS files.
Verify that extracted GDS meets all specified design requirements.
Conduct backend verification including IR and EM analysis.
Support post-silicon efforts to ensure successful productization.

What we're looking for

Bachelor of Science degree.
Minimum of 10 years of relevant industry experience.
Experience in SoC design cycles, specifically developing circuits and SRAM/Register Files for low power and high performance.
Knowledge of cache design, architecture, and memory hierarchy.
Working knowledge of RTL modeling.
Solid understanding of industry-standard design tools.
Deep understanding of nanometer device physics, leakage mechanisms, and technology interactions with device behavior.
Proficiency in Machine Learning algorithms and scripting is preferred.