SRAM Circuit Design Engineer

Apple Inc

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Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $142,300–$263,300 / yr
Posted: 82 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Competitive pay

How this pay compares to similar roles

Similar $199k

This role $203k

$128k $278k

below market most similar roles pay here above market

This role pays more than 50% of similar roles. Most pay $168,200–$229,100 — the blue band above. At the midpoint, this role pays about $203k versus about $199k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3595 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2772 roles with salary data.

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At a glance

TL;DR · SRAM Circuit Design Engineer

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The SRAM Circuit Design Engineer joins the Digital Custom Group to design and implement custom digital circuits for SRAM. Working within the silicon design effort, this role involves collaborating with logic and architecture teams to formulate specifications and define topologies optimized for power, timing, area, and yield. Key responsibilities include schematic capture, simulations, margin verifications, functional equivalency, and DFT modeling. The engineer will also write RTL, validate use-cases, perform backend verification for IR/EM, and support post-silicon efforts. Required skills include experience with SoC design cycles, nanometer device physics, and industry-standard design tools. The role specifically addresses the technical challenges of developing low power, low voltage, and high performance SRAM and Register Files for products like the M1 and A14 Bionic chips.

Skills

SRAM Design RTL SoC Design Circuit Design Schematic Capture DFT IR/EM Machine Learning

What you'll do

Design and implement custom digital circuits for SRAM design.
Define architecture and topologies to optimize for power, timing, area, and yield.
Perform schematic capture, simulations, analysis, and margin verifications.
Write RTL and validate use-cases against design schematics.
Collaborate with layout teams to create and verify optimal GDS.
Perform backend verification, including IR and EM analysis.
Support post-silicon efforts to enable productization.

What we're looking for

BS degree in a relevant field.
Minimum of 3 years of relevant industry experience.
Experience within a SoC design cycle developing circuits and SRAM/Register Files for low power, low voltage, and high performance (preferred).
Knowledge of Cache design/architecture and memory hierarchy (preferred).
Working knowledge of RTL modeling (preferred).
Solid understanding of industry-standard design tools (preferred).
Deep understanding of nanometer device physics, leakage mechanisms, and technology interactions with device behavior (preferred).
Ability to devise experiments and analyze data for silicon debug (preferred).
Knowledge of Machine Learning algorithms and scripting (preferred).

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