Senior Technical Project Lead, Silicon Engineering

SpaceX

Confirmed live today Low trust

Quick summary

Work type
On-site
Location
Redmond, WAAustin, TXIrvine, CASunnyvale, CA
Salary
$165,000–$260,000 / yr
Posted
123 days ago
Freshness
Confirmed live today

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $207k
This role $212k
$154k $271k
below market most similar roles pay here above market

This role pays more than 52% of similar roles. Most pay $171,367–$241,750 — the blue band above. At the midpoint, this role pays about $212k versus about $207k for comparable roles.

Based on 240 similar postings.

Employer

About SpaceX

SpaceX designs, manufactures, and launches advanced rockets and spacecraft with the mission of enabling humans to become a multi-planetary species. It operates the Falcon 9, Falcon Heavy, and Starship launch vehicles, as well as the Starlink satellite internet constellation.

SpaceX currently has 851 open roles on FindRole.

Listed pay typically runs $130,000–$165,000 across 590 roles with salary data.

Most-posted roles

View all roles at SpaceX

At a glance

TL;DR · Senior Technical Project Lead, Silicon Engineering

The Sr. Technical Project Lead (Silicon Engineering) joins a cross-disciplinary team to develop next-generation ASICs for space and ground infrastructures. This role involves driving complex silicon projects from kick-off through production, tracking milestones for front-end and backend development, and collaborating with supply chain partners to secure materials. The successful candidate will manage silicon design, bring-up, qualification, and ramp-up to mass production while coordinating with external IP and EDA tool vendors. Key technical requirements include knowledge of digital and analog/RF ASIC design processes, wafer and package ATE testing, PCB schematics, and silicon software drivers. The position requires proficiency in project management tools like Jira, Smartsheet, and Confluence to solve connectivity problems and expand the performance capabilities of the Starlink satellite network.

What you'll do

  • Drive complex silicon projects from initial kick-off through final production.
  • Track and communicate schedules and milestones for front-end and backend ASIC development.
  • Coordinate with multidisciplinary teams to facilitate fast silicon bring-up.
  • Partner with the silicon team and supply chain to identify and source development suppliers.
  • Lead discussions with internal and external stakeholders to identify and rectify technical issues.
  • Manage the transition from engineering wafers to mass production.
  • Oversee silicon design, qualification, and reliability testing for specific mission profiles.

What we're looking for

  • Bachelor’s degree in an engineering discipline.
  • 8+ years of Technical Project or Program Management experience.
  • Must be a U.S. citizen, national, lawful permanent resident, refugee, asylee, or eligible for Department of State authorization.
  • Master’s degree in an engineering discipline (preferred).
  • Project leadership of satellite and/or consumer product lifecycle(s) (preferred).
  • Knowledge and experience with digital and/or analog/RF ASIC design processes from project kick-off to tape-out (preferred).
  • Experience with advance node fabs, package substrates, OSAT partners, and EDA tool vendors (preferred).
  • Proficiency in project management tools like Jira, Smartsheet, or Confluence (preferred).

More like this

Similar roles

Senior SOC/ASIC Physical Design Engineer

SpaceX

Palo Alto, CA +3 154 days ago $175,000–$280,000
ASIC Physical Design RTL2GDSII Static Timing Analysis STA FinFET CMOS DFT Scan MBIST LBIST Python TCL Perl Bash Makefile EDA Tools Floorplanning Place and Route Physical Verification Electromigration Voltage Drop
5+ yrs exp

Senior SOC/ASIC Physical Design Engineer

SpaceX

Irvine, CA +2 154 days ago $165,000–$260,000
ASIC Physical Design RTL2GDSII Static Timing Analysis STA FinFET CMOS DFT Scan MBIST LBIST Python TCL Perl Bash Makefile EDA Tools Floorplanning Place and Route Physical Verification Electromigration Voltage Drop
5+ yrs exp

Senior SOC/ASIC Physical Design Engineer

SpaceX

Austin, TX +2 154 days ago
ASIC SOC Physical Design RTL2GDSII Static Timing Analysis STA Floorplanning Place and Route Physical Verification Electromigration Voltage Drop Logic Equivalency FinFET CMOS DFT Scan MBIST LBIST Python TCL Perl Bash Makefile EDA Tools
5+ yrs exp