Senior Post Silicon Engineer

Amazon Inc

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Quick summary

Work type: On-site
Location: Austin, TXRedmond, WA
Salary: $185,200–$250,000 / yr
Posted: 56 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $174k

This role $218k

$136k $262k

below market most similar roles pay here above market

This role pays more than 95% of similar roles. Most pay $160,000–$187,250 — the blue band above. At the midpoint, this role pays about $218k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 643 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 636 roles with salary data.

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At a glance

TL;DR · Senior Post Silicon Engineer

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As a Sr. Post Silicon Engineer for Amazon LEO, you will join a high-performance team developing silicon engineered for the harsh environment of space. You will be responsible for the bring up, validation, and characterization of a MODEM SOC, ensuring successful integration into satellite products. Your daily work involves leading validation planning for high-speed peripherals like LPDDR4 and SerDes, designing SOC test platforms, and developing test automation for interfaces including I3C, QSPI, and Ethernet. You will conduct system-level debugs using Python, Embedded C, and JTAG-based tools like Lauterbach. Additionally, you will utilize benchtop instruments such as high-speed oscilloscopes, spectrum analyzers, and BERTs to characterize PLL performance, signal integrity, and power integrity while collaborating with design and manufacturing teams.

Skills

SOC ASIC Bring Up SerDes LPDDR4 Python Embedded C FPGA Emulator I3C QSPI Ethernet I2C SPI eMMC JTAG Lauterbach Signal-Integrity Power-Integrity

What you'll do

Lead validation and characterization planning for MODEM SOC and high-speed peripherals like LPDDR4 and SerDes.
Design and develop SOC test platforms with robust architectural integrity.
Develop and maintain advanced test automation and testbenches for high-speed interfaces and peripherals.
Conduct system-level debugs in coordination with Design, DV, Architecture, and Manufacturing teams.
Utilize FPGA and Emulators to ensure successful SOC Bring Up.
Characterize PLL performance using metrics such as jitter and phase noise.
Perform power analysis and characterization alongside signal and power integrity testing.

What we're looking for

Must be a U.S. citizen, national, permanent resident, refugee, or granted asylum.
Bachelor's degree in electrical engineering or equivalent.
8+ years of work experience in Bring Up, Validation, and characterization of SOC or ASIC.
Proficient in characterizing PLL performance through metrics like jitter and phase noise.
Familiarity with protocols such as I2C, SPI, I3C, and eMMC.
Experience using benchtop instruments like Oscilloscopes, Signal Generators, Spectrum Analyzers, and BERTs.
Working knowledge of Python and Embedded C.
Export control laws and regulations, candidates.