Senior Module Engineer, Hybrid Bonding

Applied Materials

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$147,000–$202,500 / yr
Employment
Full-time
Posted
51 days ago
Freshness
Confirmed live 2 days ago

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $182k
This role $175k
$136k $229k
below market most similar roles pay here above market

This role pays less than 53% of similar roles. Most pay $148,250–$216,250 — the blue band above. At the midpoint, this role pays about $175k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Applied Materials

Applied Materials is the world''s largest supplier of equipment, services, and software for the semiconductor and display industries, enabling the production of chips and advanced displays. Industry: Semiconductor Equipment

Applied Materials currently has 365 open roles on FindRole.

Listed pay typically runs $126,000–$173,500 across 222 roles with salary data.

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At a glance

TL;DR · Senior Module Engineer, Hybrid Bonding

The Sr. Module Engineer, Hybrid Bonding joins the team to develop and scale next-generation die-to-wafer hybrid bonding technologies for advanced semiconductor packaging. This role involves leading process module development across die preparation, surface activation, die placement, and bonding temperature optimization. You will drive copper-copper and dielectric-dielectric interconnect formation while identifying root causes for bond voids and overlay errors. Key responsibilities include performing hardware characterization using CSAM X-ray, FIB/SEM, and AFM, and utilizing DOE methodologies with JMP or Minitab for statistical process control. You will collaborate with equipment engineering teams to qualify bonding platforms for memory architectures, chiplets, and AI accelerators. The work focuses on solving technical challenges in 3D integration and HBM stacking to enable high-bandwidth, energy-efficient computing systems through advanced interconnect technologies.

What you'll do

  • Develop and optimize die-to-wafer hybrid bonding processes for advanced semiconductor packaging applications.
  • Establish process windows for surface preparation, plasma activation, die placement, and bonding temperature/pressure.
  • Identify root causes of bond voids, die shift, and overlay errors using DOE and statistical process control.
  • Drive bonding quality characterization using CSAM X-ray, FIB/SEM, AFM, and optical metrology.
  • Collaborate with equipment engineering teams to evaluate and qualify next-generation bonding platforms.
  • Execute reliability test plans including thermal cycling, HTOL, and mechanical pull/shear testing.
  • Lead cross-functional projects from initial concept through technology transfer to manufacturing.
  • Present development progress and technical results to engineering leadership and customers.

What we're looking for

  • M.S. in Materials Science, Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, or Semiconductor Manufacturing.
  • Ph.D. in Materials Science, Electrical Engineering, Mechanical Engineering, Chemical Engineering, Physics, or Semiconductor Manufacturing.
  • Minimum 5+ years of semiconductor process development experience after graduate degree.
  • Direct experience in at least one of: Hybrid bonding, Thermocompression bonding, Wafer bonding, Advanced packaging, HBM development, Cu interconnect technology, or Chiplet integration.
  • Strong understanding of Cu-Cu interconnect formation, surface chemistry, plasma activation, CMP, planarization, defect engineering, and semiconductor process integration.
  • Experience with DOE and JMP/Minitab analysis tools.
  • Familiarity with metrology and failure analysis techniques.
  • Ph.D. with 5+ years industry experience (preferred).

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