Software Engineer, Hardware Tools and Methodology - New College Grad 2026

Nvidia

Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$116,000–$189,750 / yr
Posted
3 days ago

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $170k
This role $153k
$106k most similar roles pay here $211k

This role pays less than 60% of similar roles. Most pay $141,700–$198,143 — the shaded band above. At the midpoint, this role pays about $153k versus about $170k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

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At a glance

TL;DR · Software Engineer, Hardware Tools and Methodology - New College Grad 2026

The NVIDIA Clocks team seeks a Software Developer with expertise in algorithms and RTL Design to join their dynamic group. This role involves architecting and developing tools for RTL generation across all NVIDIA products, designing automated workflows for cross-functional teams, enhancing C++ algorithms for connectivity and logic insertion, and improving the quality of existing tools used by the team. Candidates should possess a Master’s degree or equivalent experience in Computer Engineering or Electrical Engineering, with strong coding skills in C++. They must also have a solid understanding of ASIC Design and Verilog RTL, along with prior experience in RTL design, verification, synthesis, and scripting languages such as Perl, Python, and Make. Knowledge of Clocks/Resets design is highly desirable.

What you'll do

  • Architect and develop tools for RTL generation across NVIDIA products.
  • Design automated workflows to support deliverables for multiple teams.
  • Enhance algorithms in C++ for auto connectivity and Verilog RTL post-processing.
  • Improve the quality of existing tools and processes used by the team.
  • Implement efficient solutions using C++, Perl, Python, and Make scripting.

What we're looking for

  • Master's degree or higher in Computer Engineering/Electrical Engineering.
  • Proficient in C++ programming.
  • Strong understanding of ASIC Design and Verilog RTL.
  • Experience in RTL design (Verilog) and verification/synthesis.
  • Knowledge of Clocks/Resets design and verification.
  • Skilled in scripting languages like Perl, Python, Make.

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