SoC Power Analysis and Optimization Engineer

Apple Inc

Confirmed live yesterday Low trust

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Work type
On-site
Location
Austin, TX
Posted
154 days ago
Freshness
Confirmed live yesterday
Nearby
99+ roles within 25 mi

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Similar $197k
$143k most similar roles pay here $245k

This listing doesn't post a salary. Most similar roles pay $166,425–$226,587.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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TL;DR · SoC Power Analysis and Optimization Engineer

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As an SoC Power Analysis and Optimization Engineer within the Silicon Engineering group, you will drive critical power simulation, optimization, and modeling tasks to improve overall system efficiency. You will collaborate with cross-functional architecture, RTL, and physical design teams to identify use cases for power simulation, provide future project projections, and develop automated approaches using GenAI and LLM technologies. Your daily work involves exploring new methodologies to analyze data, creating specific metrics to pinpoint optimization opportunities across various IPs, and deploying optimizations to improve runtime and performance. The role requires expertise in ASIC power analysis, machine learning algorithms, Verilog, System Verilog, and Python scripting. You will apply your knowledge of computer architecture, logic, circuit design, and signal processing to solve complex power efficiency challenges within the SoC design flow and methodology.

Skills

ASIC Power Analysis Power Optimization Verilog System Verilog Python Machine Learning GenAI LLM RTL Signal Processing Automation Computer Architecture

What you'll do

  • Drive SoC power simulation, optimization, and modeling tasks.
  • Provide power projections and targets for future projects based on specific use-cases.
  • Improve SoC power efficiency through automation and GenAI/LLM approaches.
  • Develop new methodologies to analyze power data and create metrics to identify optimization opportunities.
  • Implement automated approaches to improve SoC power efficiency across various IPs.
  • Deploy power optimizations in collaboration with cross-functional architecture, RTL, and physical design teams.
  • Review results and refine methodologies for better efficiency and runtime.

What we're looking for

  • A bachelor's degree in a relevant field is required.
  • Minimum of 10 years of relevant industry experience is required.
  • Familiarity with ASIC power analysis and optimization is preferred.
  • Familiarity with machine learning algorithms and programming is preferred.
  • Familiarity with Verilog and SystemVerilog is preferred.
  • Familiarity with SoC design flow, methodology, computer architecture, logic, and circuit design is preferred.
  • Proficiency in Python scripting is preferred.
  • Strong communication skills are required to interface with cross-functional teams.

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