SoC Power Analysis and Optimization Engineer

Apple Inc

Confirmed live 2 days ago Low trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$142,300–$263,300 / yr
Posted
154 days ago
Freshness
Confirmed live 2 days ago

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $197k
This role $203k
$128k most similar roles pay here $278k

This role pays more than 52% of similar roles. Most pay $166,425–$226,587 — the shaded band above. At the midpoint, this role pays about $203k versus about $197k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · SoC Power Analysis and Optimization Engineer

As part of the Silicon Engineering group, the SoC Power Analysis and Optimization Engineer is responsible for driving SOC power simulation, optimization, and modeling. The role involves collaborating with cross-functional architecture, RTL, and physical design teams to determine use-cases for power simulation, provide projections for future projects, and improve overall SOC power efficiency. Key responsibilities include developing automated approaches using GenAI/LLM methods, creating new metrics to identify optimization opportunities across IPs, and refining methodologies for runtime and scope. The ideal candidate possesses expertise in ASIC power analysis, computer architecture, logic, and circuit design. Technical skills required include proficiency in Verilog, System Verilog, and Python scripting. Additional preferred competencies include experience with machine learning algorithms, signal processing, silicon power measurement, and low-power design to solve complex challenges within the SoC design flow.

What you'll do

  • Drive SoC power simulation, optimization, and modeling tasks.
  • Provide power projections and targets for future projects based on specific use-cases.
  • Improve SoC power efficiency through automation and GenAI/LLM approaches.
  • Develop new methodologies to analyze power data and create metrics to identify optimization opportunities.
  • Implement automated approaches to improve SoC power efficiency across various IPs.
  • Deploy power optimizations and review results to improve methodology, runtime, and design scope.

What we're looking for

  • A bachelor's degree in a relevant field is required.
  • At least 3 years of relevant industry experience are required.
  • Familiarity with ASIC power analysis and optimization is preferred.
  • Familiarity with machine learning algorithms and Python scripting is preferred.
  • Familiarity with Verilog, System Verilog, and SoC design flow is preferred.
  • Knowledge of computer architecture, logic, and circuit design is preferred.
  • Experience in SoC power modeling, low power design, and silicon power measurement is preferred.
  • Strong communication skills are required to interface with cross-functional teams.

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