SoC Power Analysis and Optimization Engineer

Apple Inc

Confirmed live 2 days ago Low trust

Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$150,400–$277,600 / yr
Posted
154 days ago
Freshness
Confirmed live 2 days ago
Nearby
99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $197k
This role $214k
$135k most similar roles pay here $293k

This role pays more than 65% of similar roles. Most pay $166,425–$226,587 — the shaded band above. At the midpoint, this role pays about $214k versus about $197k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · SoC Power Analysis and Optimization Engineer

Role Posting Log in to save

As part of the Silicon Engineering group, the SoC Power Analysis and Optimization Engineer is responsible for driving SoC power simulation, optimization, and modeling. This role involves collaborating with cross-functional architecture, RTL, and physical design teams to determine use cases for power simulation, provide projections for future projects, and improve overall SoC power efficiency. The engineer will develop new methodologies to analyze data, create metrics to identify optimization opportunities, and implement automated approaches using GenAI/LLM techniques. Key technical skills include familiarity with ASIC power analysis, machine learning algorithms, Verilog, System Verilog, Python scripting, computer architecture, logic, and circuit design. The role focuses on solving complex power efficiency challenges across various IPs while improving methodology for runtime and broader design scopes within the silicon development lifecycle.

Skills

ASIC Power Analysis Power Optimization Verilog System Verilog Python Machine Learning GenAI LLM Signal Processing RTL Automation

What you'll do

  • Drive SoC power simulation, optimization, and modeling tasks.
  • Provide power projections and targets for future projects based on specific use-cases.
  • Improve SoC power efficiency through automation and GenAI/LLM approaches.
  • Develop new methodologies to analyze power data and create metrics to identify optimization opportunities.
  • Implement automated approaches to improve SoC power efficiency across various IPs.
  • Deploy power optimizations and review results to improve methodology, runtime, and design scope.

What we're looking for

  • A bachelor's degree in a relevant field and at least 3 years of relevant industry experience.
  • Familiarity with ASIC power analysis and optimization (preferred).
  • Familiarity with machine learning algorithms and programming (preferred).
  • Familiarity with Verilog, System Verilog, and Python scripting (preferred).
  • Familiarity with SOC design flow, methodology, computer architecture, logic, and circuits design (preferred).
  • Experience in signal processing (preferred).
  • Experience in silicon power measurement, SOC power modeling, low power design, and power optimization (preferred).
  • Strong communication skills are a pre-requisite.

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