SoC Power Analysis and Optimization Engineer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
80 days ago
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Confirmed live today
Nearby
99+ roles within 25 mi

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Similar $207k
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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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TL;DR · SoC Power Analysis and Optimization Engineer

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As an SoC Power Analysis and Optimization Engineer within the Silicon Engineering group, you will drive SOC power simulation, optimization, and modeling. You will collaborate with cross-functional architecture, RTL, and physical design teams to determine use-cases, provide power projections, and improve overall SOC power efficiency. Your daily work involves creating power metrics to identify optimization opportunities and developing automated approaches using GenAI and LLM techniques. You will deploy power optimizations across IPs while reviewing results to improve methodology, runtime, and design scope. The role requires proficiency in ASIC power analysis, machine learning algorithms, Verilog, System Verilog, and Python scripting. You must possess a strong understanding of computer architecture, logic, and circuits design to solve complex silicon power measurement and modeling problems.

Skills

ASIC Power Analysis SOC Power Modeling Python Verilog System Verilog Machine Learning GenAI LLM RTL Physical Design Computer Architecture Signal Processing Silicon Power Measurement Low Power Design Automation

What you'll do

  • Drive SOC power simulation, optimization, and modeling tasks.
  • Provide power projections and targets for future projects based on specific use-cases.
  • Improve SOC power efficiency through automation and GenAI/LLM approaches.
  • Create power metrics to identify specific optimization opportunities across IPs.
  • Develop new methodologies to analyze power data and improve simulation runtime.
  • Deploy power optimizations across the SOC and review the resulting performance.
  • Interface with architecture, RTL, and physical design teams to define power requirements.

What we're looking for

  • A bachelor's degree in a relevant field is required.
  • At least 3 years of relevant industry experience is required.
  • Familiarity with ASIC power analysis and optimization (preferred).
  • Familiarity with machine learning algorithms and programming (preferred).
  • Familiarity with Verilog and System Verilog (preferred).
  • Familiarity with SOC design flow and methodology (preferred).
  • Familiarity with scripting in Python (preferred).
  • Familiarity with computer architecture, logic, and circuits design (preferred).

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