SoC Power Analysis and Optimization Engineer

Apple Inc

Confirmed live yesterday Low trust

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Work type
On-site
Location
Beaverton, OR
Posted
154 days ago
Freshness
Confirmed live yesterday

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How this pay compares to similar roles

Similar $197k
$143k most similar roles pay here $245k

This listing doesn't post a salary. Most similar roles pay $166,425–$226,587.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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TL;DR · SoC Power Analysis and Optimization Engineer

As a SoC Power Analysis and Optimization Engineer within the Silicon Engineering group, you will drive power simulation, optimization, and modeling for complex systems. You will collaborate with cross-functional architecture, RTL, and physical design teams to identify use cases, provide power projections, and improve overall efficiency. Your daily work involves developing new methodologies to analyze data, creating metrics to pinpoint optimization opportunities, and implementing automated approaches using GenAI and LLM techniques. The role requires expertise in ASIC power analysis, machine learning algorithms, Verilog, SystemVerilog, and Python scripting. You will also apply knowledge of computer architecture, logic, circuit design, and signal processing to solve technical challenges regarding SoC power modeling and low-power design. This position focuses on improving efficiency across various IPs while managing the complexities of modern silicon design flows and methodologies.

What you'll do

  • Drive SoC power simulation, optimization, and modeling tasks.
  • Provide power projections and targets for future projects based on specific use-cases.
  • Improve SoC power efficiency through automation and GenAI/LLM approaches.
  • Develop new methodologies to analyze power data and create metrics to identify optimization opportunities.
  • Implement automated approaches to improve SoC power efficiency across various IPs.
  • Deploy power optimizations in collaboration with cross-functional architecture, RTL, and physical design teams.
  • Review results and refine methodologies for better efficiency and runtime.

What we're looking for

  • A bachelor's degree in a relevant field is required.
  • At least 10 years of relevant industry experience are required.
  • Familiarity with ASIC power analysis and optimization is preferred.
  • Familiarity with machine learning algorithms and programming is preferred.
  • Familiarity with Verilog and SystemVerilog is preferred.
  • Familiarity with SoC design flow, methodology, and computer architecture is preferred.
  • Proficiency in Python scripting and signal processing is preferred.
  • Experience in silicon power measurement, modeling, and low power design is preferred.

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