SoC Power Analysis and Optimization Engineer

Apple Inc

Confirmed live 2 days ago Low trust

Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$184,700–$324,800 / yr
Posted
154 days ago
Freshness
Confirmed live 2 days ago
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $195k
This role $255k
$132k most similar roles pay here $345k

This role pays more than 94% of similar roles. Most pay $166,425–$224,362 — the shaded band above. At the midpoint, this role pays about $255k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · SoC Power Analysis and Optimization Engineer

Role Posting Log in to save

As part of the Silicon Engineering group, the SoC Power Analysis and Optimization Engineer is responsible for driving SOC power simulation, optimization, and modeling. Working with cross-functional architecture, RTL, and physical design teams, the engineer identifies use cases to simulate power, provides projections for future projects, and improves overall SOC power efficiency. The role involves developing automated approaches using GenAI and LLM methods, creating new metrics to identify optimization opportunities across IPs, and refining methodologies for runtime and broader design scopes. Candidates should possess expertise in ASIC power analysis, computer architecture, logic, and circuit design. Technical skills include proficiency in Verilog, System Verilog, and Python scripting. Additional preferred experience includes machine learning algorithms, signal processing, silicon power measurement, and low-power design to solve complex challenges in SOC power modeling and efficiency.

Skills

ASIC Power Analysis SOC Simulation Power Modeling Python Verilog System Verilog Machine Learning GenAI LLM Signal Processing Low Power Design RTL Automation

What you'll do

  • Drive SoC power simulation, optimization, and modeling tasks.
  • Provide power projections and targets for future projects based on specific use-cases.
  • Improve SoC power efficiency through automation and GenAI/LLM approaches.
  • Develop new methodologies to analyze power data and create metrics to identify optimization opportunities.
  • Implement automated approaches to improve SoC power efficiency across various IPs.
  • Deploy power optimizations in collaboration with cross-functional teams.
  • Review results to improve methodology regarding efficiency, runtime, and design scope.

What we're looking for

  • A bachelor's degree in a relevant field is required.
  • At least 10 years of relevant industry experience is required.
  • Familiarity with ASIC power analysis and optimization is preferred.
  • Familiarity with machine learning algorithms and programming is preferred.
  • Familiarity with Verilog and System Verilog is preferred.
  • Familiarity with SoC design flow, methodology, computer architecture, logic, and circuit design is preferred.
  • Proficiency in Python scripting is preferred.
  • Strong communication skills are required to interface with cross-functional teams.

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