SoC Power Analysis and Optimization Engineer

Apple Inc

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $171,600–$302,200 / yr
Posted: 62 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k

This role $237k

$129k most similar roles pay here $321k

This role pays more than 83% of similar roles. Most pay $165,250–$216,250 — the shaded band above. At the midpoint, this role pays about $237k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · SoC Power Analysis and Optimization Engineer

Apply Now Log in to save

Join our Silicon Engineering group as an SoC Power Analysis and Optimization Engineer, where you will work on cutting-edge projects to enhance SOC power efficiency. You will collaborate closely with architecture, RTL, and physical design teams to simulate power usage, set targets for future projects, and develop innovative methodologies to optimize power consumption. Your day-to-day tasks include driving automation and leveraging GenAI/LLM approaches to improve analysis and optimization processes. Key skills required are expertise in ASIC power analysis, machine learning algorithms, Verilog/SystemVerilog, Python scripting, and SOC design flow methodology. Familiarity with computer architecture, logic circuits, signal processing, and silicon power measurement is beneficial. This role demands strong communication abilities as you will interact extensively across various teams to deploy optimization strategies and refine methodologies for broader design applications.

Skills

Verilog SystemVerilog Python ASIC machine learning algorithms SOC design flow scripting computer architecture logic and circuits design signal processing Silicon power measurement SOC power modeling low power design power optimization

What you'll do

Drive SOC power simulation, optimization, and modeling for future projects.
Collaborate with architecture, RTL, and physical design teams to enhance SOC power efficiency.
Develop new methodologies for analyzing power data and identifying optimization opportunities.
Implement automated approaches using GenAI/LLM to improve SOC power efficiency across IPs.
Review and refine power optimization results to enhance methodology efficiency and runtime.

What we're looking for

At least 10 years of relevant industry experience in hardware engineering.
Expertise in SOC power simulation, analysis, and optimization methodologies.
Proficiency in Verilog/System Verilog for hardware design and verification.
Experience with machine learning algorithms and Python scripting.
Knowledge of ASIC power analysis and low-power design techniques.
Strong collaboration skills to work effectively across multiple teams.

Save