SoC Physical Design Methodology Engineer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
63 days ago
Nearby
99+ roles within 25 mi

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Similar $192k
$138k most similar roles pay here $234k

This listing doesn't post a salary. Most similar roles pay $165,200–$218,112.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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TL;DR · SoC Physical Design Methodology Engineer

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Join our dynamic team as a Physical Design Methodology Engineer, where you will play a crucial role in crafting methodologies that enhance the power, performance, and area (PPA) of our System-on-Chip (SoC) designs. You will collaborate closely with multi-functional teams to ensure optimal PPA through electrical analysis, construction methodology development, and silicon verification. Your responsibilities include mitigating PPA degradation, improving yield and engineering productivity by identifying new standard cells, and driving updates in production design flows using CAD tools. Proficiency in Python and Tcl scripting, along with experience in advanced technology nodes and static timing analysis, is essential. This role demands a deep understanding of interconnects, parasitic extraction, and the impact of manufacturing effects on chip performance.

Skills

Python Tcl Spice Static Timing Analysis CAD Machine Learning Data Science Silicon Verification Power Delivery Analysis Parasitic Extraction Inductance Effects Physical Design Methodology SoC Designs Advanced Technology Nodes Interconnects Performance Analysis

What you'll do

  • Develop and implement physical design methodologies to enhance PPA in SoCs.
  • Conduct electrical analysis to assess the impact of physical effects on performance.
  • Create strategies to verify theoretical improvements through silicon testing.
  • Collaborate with CAD teams to integrate new methodologies into production flows.
  • Identify and develop new standard cells to improve yield and engineering productivity.
  • Apply data science and machine learning techniques in crafting design methodologies.

What we're looking for

  • Bachelor’s degree in Electrical Engineering, Computer Science, or related field with 3 years of experience.
  • Extensive knowledge of interconnects, parasitic extraction, performance analysis, and power delivery.
  • Experience working with advanced technology nodes and understanding manufacturing effects on chip performance.
  • Proficient in Spice simulations and static timing analysis tools.
  • Familiarity with scripting languages such as Python and Tcl for flow development.
  • Ability to collaborate effectively with CAD and design teams to drive improvements in production flows.
  • Deep understanding of power-supply noise impacts and circuit design experience.

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