SoC Physical Design Methodology Engineer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
65 days ago

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Similar $192k
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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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TL;DR · SoC Physical Design Methodology Engineer

Join our dynamic team as a Physical Design Methodology Engineer, where you will play a pivotal role in crafting methodologies that enhance the power, performance, and area (PPA) of our System-on-Chip (SoC) designs. You will collaborate closely with multi-functional teams to ensure optimal PPA by developing robust construction methodologies and performing electrical analysis to mitigate any degradation found during silicon validation. Your responsibilities include creating strategies for verifying theories in silicon, applying data science and machine learning techniques, and working with CAD and design teams to drive improvements in our production flows. Ideal candidates possess a Bachelor’s degree in Electrical Engineering or Computer Science, at least 10 years of relevant industry experience, and expertise in advanced technology nodes, interconnects, parasitic extraction, and static timing analysis tools. Proficiency in Python and Tcl scripting languages is essential for this role that demands intellectual curiosity, strong communication skills, and adaptability to meet tight deadlines.

What you'll do

  • Develop and implement physical design methodologies to enhance SoC PPA efficiency.
  • Perform electrical analysis to assess how physical effects impact chip performance.
  • Create construction methodologies to mitigate PPA degradation in silicon designs.
  • Ensure accurate modeling of silicon by comparing signoff flow results with measurements.
  • Collaborate with standard cell team to identify new cells for improved PPA and yield.
  • Work with CAD and design teams to integrate improvements into production flows efficiently.
  • Verify theoretical strategies through silicon verification processes.

What we're looking for

  • At least 10 years of relevant industry experience in electrical engineering or computer science.
  • Deep expertise in SoC physical design, including interconnects and parasitic extraction.
  • Proficient in advanced technology nodes and static timing analysis methodologies.
  • Strong knowledge of power delivery systems and their impact on chip performance.
  • Comfortable with Spice simulations and circuit design, understanding inductance effects.
  • Experience in scripting languages like Python and Tcl for automation and flow development.
  • Familiarity with data science and machine learning applications in physical design methodology.

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