CPU Physical Design Methodology and Optimization Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$150,400–$277,600 / yr
Posted
149 days ago
Freshness
Confirmed live yesterday

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $208k
This role $214k
$135k most similar roles pay here $293k

This role pays more than 64% of similar roles. Most pay $176,200–$240,200 — the shaded band above. At the midpoint, this role pays about $214k versus about $208k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · CPU Physical Design Methodology and Optimization Engineer

As a CPU Physical Design Methodology and Optimization Engineer, you will join an innovative CPU design team to solve complex problems within the physical design methodology and optimization space. You will collaborate with CPU, CAD, and design teams to engineer new flows and algorithms specifically aimed at improving Power, Performance, and Area for industry-leading CPU designs. Your daily work involves performing detailed analysis across partitions to identify optimization opportunities and developing specialized flow improvements to enhance performance and efficiency. This role requires cross-functional collaboration with STA, library, tech, and post-silicon teams. You will utilize skills in digital circuits, timing, power concepts, and logic design while utilizing tools and languages including Python, TCL, and Perl. Additionally, you will explore technical areas such as applying machine learning techniques within the silicon design space for deep sub-micron technology.

What you'll do

  • Engineer new flows and algorithms to improve Power, Performance, and Area (PPA) of CPU designs.
  • Perform detailed analysis across partitions to identify specific optimization opportunities.
  • Develop physical design focused flows to enhance CPU performance and efficiency.
  • Implement machine learning techniques within the silicon design space.
  • Write scripts and code in Python, TCL, or Perl to extract PPA metrics during physical design.
  • Solve complex problems in the physical design methodology and optimization space.
  • Coordinate with CAD, STA, library, and technology teams to improve optimization results.

What we're looking for

  • Minimum of a Bachelor of Science degree.
  • At least 3 years of relevant industry experience.
  • Experience in digital circuits, timing/power concepts, and logic design.
  • Proficiency in scripting with TCL or Perl.
  • Strong fundamentals in high-performance and low-power physical design techniques.
  • Experience using industry standard synthesis, PnR, and STA tools.
  • Ability to write algorithms and code to extract Power, Performance, and Area during physical design.
  • Excellent communication skills and the ability to work well in a team environment.

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