CPU Physical Design Methodology and Optimization Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$147,400–$272,100 / yr
Posted
57 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $202k
This role $210k
$132k most similar roles pay here $287k

This role pays more than 66% of similar roles. Most pay $168,500–$235,750 — the shaded band above. At the midpoint, this role pays about $210k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · CPU Physical Design Methodology and Optimization Engineer

As a CPU Physical Design Methodology and Optimization Engineer at Apple, you will join an industry-recognized team focused on delivering cutting-edge hardware solutions. Your role involves collaborating with various teams such as CPU design, CAD engineering, and SOC development to enhance Power, Performance, and Area (PPA) metrics in CPU designs. You will develop new physical design flows and algorithms, conduct detailed analysis to identify optimization opportunities, and work closely with STA, library, technology, and post-silicon teams to improve overall efficiency. The ideal candidate has a background in digital circuits, timing/power concepts, and logic design, along with experience using TCL or Perl for scripting. Preferred qualifications include strong physical design fundamentals, proficiency in Python, TCL, or Perl, knowledge of deep sub-micron technology challenges, and excellent teamwork and communication skills.

What you'll do

  • Develop new PD-focused flows to enhance CPU performance and efficiency.
  • Conduct detailed analysis across partitions to identify optimization opportunities.
  • Engineer innovative methodologies with CAD and design teams to improve PPA.
  • Collaborate with STA, library, tech, and post-silicon teams for optimization.
  • Apply machine learning techniques in silicon design to advance technical areas.

What we're looking for

  • Minimum BS degree with 3+ years of relevant industry experience
  • Expertise in digital circuits, timing/power concepts, and logic design
  • Proficiency in TCL or Perl for scripting and automation
  • Experience with synthesis, PnR, and STA tools in physical design
  • Strong fundamentals in high-performance and low-power physical design techniques

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