SoC Physical Design Methodology Engineer

Apple Inc

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$181,100–$318,400 / yr
Posted
65 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k
This role $250k
$127k most similar roles pay here $339k

This role pays more than 94% of similar roles. Most pay $165,200–$216,250 — the shaded band above. At the midpoint, this role pays about $250k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · SoC Physical Design Methodology Engineer

Join our dynamic team as a Physical Design Methodology Engineer, where you will play a crucial role in crafting methodologies that enhance the power, performance, and area (PPA) of our System-on-Chip (SoC) designs. You will collaborate closely with multi-functional teams to ensure optimal PPA through electrical analysis, construction methodology development, and silicon verification. Your responsibilities include mitigating PPA degradation, improving standard cell design, and driving updates in production flows using data science and machine learning techniques. Ideal candidates possess a Bachelor’s degree in Electrical Engineering or Computer Science, along with 10+ years of relevant industry experience, expertise in advanced technology nodes, and proficiency in scripting languages like Python and Tcl. Knowledge of interconnects, parasitic extraction, performance analysis, and static timing methodologies is essential for this role that demands intellectual curiosity, strong communication skills, and adaptability to challenging projects.

What you'll do

  • Develop and implement physical design methodologies to enhance PPA in SoCs.
  • Conduct electrical analysis to assess the impact of physical effects on performance.
  • Create strategies to mitigate PPA degradation through construction methodologies.
  • Ensure accurate modeling of silicon by comparing signoff flows with actual measurements.
  • Collaborate with standard cell teams to identify new cells for improved PPA and yield.
  • Work with CAD and design teams to integrate improvements into production design flows.
  • Apply data science and machine learning techniques in crafting physical design methodologies.

What we're looking for

  • At least 10 years of relevant industry experience in electrical engineering or computer science.
  • Extensive knowledge of interconnects, parasitic extraction, performance analysis, and power delivery.
  • Experience with advanced technology nodes and SoC physical design methodologies.
  • Proficiency in Spice simulations and static timing analysis tools.
  • Strong understanding of scripting languages like Python and Tcl for flow development.
  • Ability to collaborate effectively across multi-functional teams on complex projects.

More like this

Similar roles

SoC Physical Design Methodology Engineer

Apple Inc

Austin, TX 65 days ago
Python Tcl Spice static timing analysis tools inductance effects parasitic extraction performance analysis power delivery machine learning data science CAD tools Silicon verification methodologies advanced technology nodes SoC design经验 电气工程知识 计算机科学知识

SoC Physical Design Methodology Engineer

Apple Inc

Austin, TX 63 days ago
Python Tcl Spice Static Timing Analysis CAD Machine Learning Data Science Silicon Verification Power Delivery Analysis Parasitic Extraction Inductance Effects Physical Design Methodology SoC Designs Advanced Technology Nodes Interconnects Performance Analysis

SOC Verification and Methodology Engineer

Qualcomm

San Diego, CA 63 days ago $115,600$173,400
SystemVerilog UVM Assertions Coverage-Based_Verification Test_Planning Tapeout SOC_Architecture ARM_Knowledge DSP AMBA_Bus DDR GPU Multimedia SBSA UCIe CXL Pre-Silicon_Emulation Power_Design Perl Python Formal_Verification

Careers

Qualcomm

San Diego, CA 37 days ago
SystemVerilog UVM Assertions Coverage-based Verification Test Planning Tapeout Perl Python Formal Verification ARM Architecture SOC Architecture DSP AMBA Bus DDR GPU Multimedia SBSA Heterogeneous Multi-die System D2D Interfaces Pre-silicon Emulation

SOC Systems Performance Engineer

Qualcomm

San Diego, CA 43 days ago $99,400$149,200
C C++ SystemC Linux ARM Python VLSI Docker Git Jenkins CI/CD AWS Google Cloud Platform Azure Terraform Kubernetes PostgreSQL MongoDB Prometheus Grafana