CPU Physical Design Methodology and Optimization Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$181,100–$318,400 / yr
Posted
57 days ago
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $202k
This role $250k
$142k most similar roles pay here $337k

This role pays more than 90% of similar roles. Most pay $168,500–$235,750 — the shaded band above. At the midpoint, this role pays about $250k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · CPU Physical Design Methodology and Optimization Engineer

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Join the CPU design team as a Physical Design Methodology and Optimization Engineer, contributing to groundbreaking Apple products by enhancing Power, Performance, and Area (PPA) of industry-leading CPU designs. You will collaborate closely with various teams including CAD and post-silicon groups to develop new flows and algorithms that optimize physical design, conduct detailed analysis to identify optimization opportunities, and apply machine learning techniques in silicon design. Essential skills include experience in digital circuits, timing/power concepts, logic design, and proficiency in TCL or Perl, while preferred qualifications involve strong knowledge of high-performance and low-power physical design techniques, industry-standard synthesis tools, and Python or Perl scripting for algorithm development in deep sub-micron technology contexts.

Skills

TCL Perl Python Synthesis PnR STA

What you'll do

  • Develop new flows/algorithms to enhance CPU PPA.
  • Conduct detailed analysis to identify optimization opportunities.
  • Improve CPU performance and efficiency through innovative PD methods.
  • Collaborate with STA, library, tech teams for physical design optimization.
  • Apply machine learning techniques in silicon design processes.

What we're looking for

  • Minimum 10 years of industry experience in digital circuits and timing/power concepts
  • Expertise in developing new flows/algorithms to enhance PPA in CPU designs
  • Proficiency in TCL or Perl for scripting and automation
  • Strong fundamentals in high-performance and low-power physical design techniques
  • Experience with synthesis, PnR, and STA tools in the industry-standard environment

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