below marketmost similar roles pay hereabove market
This role pays less than
91%
of similar roles. Most pay
$177,250–$241,750
— the blue band above.
At the midpoint, this role pays about
$152k
versus about
$210k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
575 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 550 roles with salary data.
JOB TITLE: SoC Modeling Engineer
The SoC Modeling Engineer joins the SoC Architecture team to support the modeling of various physical and performance aspects of SoC operation. The successful candidate will model electrical systems and circuits at the component and transistor levels, alongside thermal systems and Power Delivery circuits including PMIC and PDN. Daily responsibilities involve modeling SoC traffic patterns, performing digital design at RTL, gate-level, and transistor levels, and automating simulations and exploration spaces. Required technical skills include hands-on experience with MatLab, SimuLink, and SPICE simulations at the component and device levels. The role requires a deep understanding of ASIC design, verification, validation, and integration. Candidates should possess strong comprehension, organization, and communication skills to solve complex hardware architecture problems.
Model physical and performance aspects of SoC operations.
Perform SPICE simulations at the component and device levels.
Model electrical systems, circuits, and thermal systems.
Model Power Delivery circuits including PMIC and PDN.
Perform digital design at RTL, gate-level, and transistor levels.
Model SoC traffic patterns.
Automate simulations and exploration spaces.
What we're looking for
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
Hands-on experience with MatLab, SimuLink, or similar tools.
Hands-on experience with SPICE simulations at component and device levels.
Experience modeling electrical systems, circuits, thermal systems, Power Delivery circuits, and SoC traffic patterns.
Experience with digital design at RTL, gate-level, and transistor levels.
Knowledge of AI, Machine Learning, Computer Architecture, or Queueing Theory (preferred).