Signal Integrity and PCB Design Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$116,000–$189,750 / yr
Employment
Full-time
Posted
5 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $210k
This role $153k
$99k $279k
below market most similar roles pay here above market

This role pays less than 90% of similar roles. Most pay $177,250–$241,750 — the blue band above. At the midpoint, this role pays about $153k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1463 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1096 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · Signal Integrity and PCB Design Engineer

The Signal Integrity and PCB Design Engineer joins the SI team to ensure boards meet demanding signal integrity requirements from early material research through high-volume manufacturing. You will lead SI design activities, including PCB stackup design, material selection, and design guide implementation. Daily responsibilities involve system-level signal integrity simulation for interfaces like PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, and USB, alongside optimizing Power Delivery Networks. You will perform TDR and VNA measurements for material characterization and model correlation. Required skills include a deep understanding of electromagnetics and transmission line theory. You must be proficient with Cadence Allegro PCB designer, Constraints Manager, HFSS, Sigrity, and Hspice. This role solves complex signal integrity challenges across product lines including consumer graphics, self-driving cars, and artificial intelligence.

What you'll do

  • Lead SI design activities including PCB stackup design, material selection, and design guide implementation.
  • Perform system-level signal integrity simulations for PCIe, LPDDR/DDR/GDDR, MIPI, HDMI, and USB interfaces.
  • Analyze and optimize the Power Delivery Network (PDN) on PCBs.
  • Conduct TDR and VNA measurements for package and PCB material characterization and model correlation.
  • Provide SI/PI performance solutions in coordination with Package and PCB Design teams.
  • Evaluate the impact of high-volume PCB manufacturing processes on channel signal integrity.
  • Perform post-layout analysis to ensure designs meet demanding signal integrity requirements.

What we're looking for

  • BS/MS in Electrical Engineering or equivalent experience.
  • Minimum 2+ years of experience as an SI/PI engineer.
  • Deep understanding of electromagnetics, transmission line theory, and various channel components.
  • Experience with Cadence Allegro PCB designer, Constraints Manager, or other PCB stackup designer tools.
  • Understanding of impacts of high-volume PCB manufacturing on channel signal integrity.
  • Experience with SI channel design solutions for industry standard interfaces like PCIE, DRAM, MIPI, HDMI, and USB.
  • Hands-on experience with HFSS, Sigrity, Hspice, and/or similar industry standard tools.
  • Experience with SI/PI design sign-off process at platform level (preferred).

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