below marketmost similar roles pay hereabove market
This role pays more than
78%
of similar roles. Most pay
$184,975–$257,525
— the blue band above.
At the midpoint, this role pays about
$262k
versus about
$221k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
575 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 550 roles with salary data.
The Server Power Management Sr. Staff Architect joins the Qualcomm Data Center team to develop high-performance, energy-efficient server solutions. This role involves defining the end-to-end power management architecture for a Server SoC by collaborating with CPU and SoC architects to optimize power, performance, and thermal efficiency. Key responsibilities include executing system-level power modeling for server use cases, driving convergence of SoC and board power grid definitions, and architecting system-level power rail sequencing. The position requires expertise in CPU and SoC power management, microarchitecture, digital ASIC design, and CMOS circuit power. Candidates must demonstrate skills in TDP capping, over-current and voltage droop management, and power telemetry. The work focuses on designing complex, low-power solutions at advanced process nodes for hyperscale data center applications using off-the-shelf PMICs.
Define the end-to-end power management architecture for Server SoCs.
Develop optimal power management architectures by collaborating with hardware, software, and firmware architects.
Execute system-level power modeling for server use cases and analyze performance trade-offs.
Drive the convergence of SoC and board power grid definitions.
Architect SoC and system-level power rail sequencing.
Collaborate with thermal engineers to optimize power management implementation.
Create detailed architecture specification documents for power management systems.
What we're looking for
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant engineering work experience.
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of relevant engineering work experience.
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of relevant engineering work experience.
Over 10 years of experience in power management of CPU and/or SoCs, and at least 5 years of experience with a high-performance server chip (preferred).
15+ years in CPU and/or SoC architecture (preferred).
Strong expertise in power management of high-performance systems, including active power, idle low power, and silicon/system limits (preferred).
Experience in power delivery systems, digital ASIC design, CMOS circuit power, and TDP capping and control (preferred).
Proven track record in hyperscale data center solutions and experience with off-the-shelf PMICs (preferred).
SoC Architecture
CPU Architecture
Chiplet Architecture
ARM Architecture
Digital ASIC Design
CMOS
Coherency Management
Power Management
RAS
Security
Debug and Test Architecture
Hardware Engineering
System Design