below marketmost similar roles pay hereabove market
This role pays more than
59%
of similar roles. Most pay
$169,362–$227,500
— the blue band above.
At the midpoint, this role pays about
$213k
versus about
$198k
for comparable roles.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
1792 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 1179 roles with salary data.
The Senior Silicon Product Development Engineer joins the GPU PDE team to manage product bring up from pre-Silicon through NPI to market launch. This role involves owning the development and implementation of ATE test content, maintaining strict project plans for market delivery, and predicting test durations while analyzing characterization outcomes. The engineer will manage key vendor relationships with Foundry, Assembly, and Memory partners to ensure flawless collaboration and high chip quality. Required expertise includes ASIC Mixed Signal build, characterization, and qualification of BIST and SCAN DFT methodologies. Candidates must possess knowledge of FinFET technology, Chip-On-Wafer-On-Substrate Assembly, and HBM Memory vendor management. The position focuses on solving complex manufacturing yield issues and ensuring successful silicon product development through analytical problem-solving and technical coordination.
Manage product bring-up from pre-silicon through NPI to successful market launch.
Own the development and implementation of ATE test content for the product line.
Develop and maintain project plans to ensure strict adherence to market delivery timelines.
Predict test durations and analyze characterization outcomes to impact manufacturing yields.
Manage key vendor relationships with Foundry, Assembly, and Memory partners.
Collaborate with Supply and Demand program management to meet chip quality levels.
Drive complex schedules and problem resolution using analytical techniques.
What we're looking for
Bachelor or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience.
7+ years of direct PDE experience.
Strong problem-solving skills and a proven track record in ASIC Mixed Signal build, characterization, and qualification of BIST and SCAN DFT methodologies.
Knowledgeable in advanced Silicon Process technology such as FinFET.
Hands-on experience in Chip-On-Wafer-On-Substrate Assembly, Silicon GPU Product Engineering, and HBM Memory vendor management.
Excellent interpersonal skills for effective multi-functional and cross-company collaboration.
Demonstrates comprehensive understanding of Memory testing methodology (preferred).
In-depth knowledge of assembly stacking processes and vendor management (preferred).