Senior Silicon Design Engineer

Microsoft

Confirmed live today Trusted
Hybrid

Quick summary

Work type
Hybrid
Location
—
Salary
$119,800–$234,700 / yr
Posted
15 days ago
Freshness
Confirmed live today
Closes
Apr 12, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $192k
This role $177k
$106k $248k
below market most similar roles pay here above market

This role pays less than 56% of similar roles. Most pay $161,975–$223,000 — the blue band above. At the midpoint, this role pays about $177k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Microsoft

Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing

Microsoft currently has 687 open roles on FindRole.

Listed pay typically runs $119,800–$234,700 across 646 roles with salary data.

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At a glance

TL;DR · Senior Silicon Design Engineer

The Senior Silicon Design Engineer joins the Shared and Custom IP & Silicon team within the Compute Silicon & Manufacturing Engineering organization. This role focuses on the design, development, and manufacturing of Microsoft's Azure Cobalt chips. You will own the development of custom IPs from microarchitecture to RTL implementation, verification, and post-silicon validation. Key responsibilities include designing high-performance, power-efficient RTL, driving PPA optimization, and leading design signoff activities such as CDC, RDC, LINT, synthesis, and STA. You will also develop hardware algorithms for data processing acceleration and perform root-cause analysis on complex system issues. Required technical skills include SystemVerilog, Verilog, VHDL, and Python, Perl, C/C++, or C#. You must also possess knowledge of AMBA AXI protocols and experience with static timing analysis.

What you'll do

  • Own custom IP development from microarchitecture to RTL implementation, verification, and post-silicon validation.
  • Develop high-performance, power-efficient RTL designs and drive PPA optimization across the design lifecycle.
  • Lead design signoff activities including CDC, RDC, LINT, synthesis, STA, and timing closure.
  • Design leading-edge hardware algorithms to provide hardware acceleration for key data processing operations.
  • Drive pre-silicon and post-silicon debug, silicon bring-up, and root-cause analysis of complex system issues.
  • Mentor engineers and champion design excellence through reviews, automation, and continuous methodology improvements.

What we're looking for

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of technical engineering experience.
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of technical engineering experience.
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of technical engineering experience.
  • Equivalent experience to the degree and years of experience requirements.
  • Ability to pass a Microsoft Cloud background check and meet export control regulations.
  • Proof of citizenship, US residency, or other protected status for export-controlled information access.
  • 3+ years experience in digital logic design in SystemVerilog/Verilog/VHDL (preferred).
  • 3+ years experience running synthesis/static check tools including RTL synthesis, lint, CDC, RDC, and/or LEC (preferred).

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