Senior Silicon ATE Development Test Engineer

Amazon Inc

Confirmed live 2 days ago High trust

Quick summary

Work type: On-site
Location: San Diego, CASunnyvale, CA
Salary: $159,200–$215,300 / yr
Posted: 78 days ago
Freshness: Confirmed live 2 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $174k

This role $187k

$135k most similar roles pay here $224k

This role pays more than 76% of similar roles. Most pay $160,000–$187,250 — the shaded band above. At the midpoint, this role pays about $187k versus about $174k for comparable roles.

Based on 240 similar postings.

Employer

About Amazon Inc

Amazon Inc. is the world''s largest e-commerce and cloud computing company, operating the Amazon marketplace, AWS cloud platform, Prime subscription services, Alexa voice AI, and logistics infrastructure. Industry: E-Commerce & Cloud Computing

Amazon Inc currently has 457 open roles on FindRole.

Listed pay typically runs $143,700–$194,400 across 447 roles with salary data.

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At a glance

TL;DR · Senior Silicon ATE Development Test Engineer

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As a Senior Silicon ATE Development Test Engineer on the Amazon Leo Silicon Team, you will join an interdisciplinary group to develop and engineer high-volume production test methodologies for custom SoCs. You will be responsible for creating chip and system test infrastructure for transmit and receive communication systems. Your daily work involves writing test plans and programs for Teradyne and Advantest equipment, designing load boards and probe cards, and converting DFT patterns into tester-suitable formats. You will optimize equalization settings for 224 Gbps SERDES and manage qualification activities like burn-in and ESD testing. The role requires expertise in RF product engineering, JTAG, boundary-scan, and PCB design for high-speed signaling. Technical skills include proficiency in Python, PERL, and Tcl/Tk, alongside experience with statistical analysis platforms to ensure manufacturing standards are met for advanced nodes.

Skills

ATE Teradyne Advantest SERDES DFT DFM JTAG Python Perl Tcl/Tk PCB Design Power Integrity Wafer Sort Statistical Analysis Spotfire JMP

What you'll do

Write test plans and programs for SoCs using Teradyne and Advantest equipment.
Design and review load boards, sockets, and probe cards for signal and power integrity.
Convert DFT team patterns into tester-suitable formats such as ATP.
Run test vectors on platforms to optimize tester and vector parameters for timing and repeatability.
Collaborate with ASIC teams to ensure production processes meet high-volume manufacturing standards.
Optimize equalization settings for high-speed SERDES running on ATE platforms.
Identify and resolve test-related issues and optimizations throughout the product lifecycle.
Assist in qualification activities including burn-in board design, HTOL, and ESD testing.

What we're looking for

Candidates must be a U.S. citizen, national, permanent resident, or granted asylum/refugee status for export control compliance.
Bachelor's degree in Electrical/Communications Engineering or equivalent experience in the electrical engineering field.
5+ years of experience in RF Test or RF Product Engineering, preferably in high-volume consumer device manufacturing.
Proficiency in writing test plans and programs for SoCs on Teradyne and Advantest equipment.
Experience with high-speed signaling, including optimizing equalization settings for up to 224 Gbps SERDES.
Knowledge of PCB design requirements, layout best practices, and hardware development for wafer sort and final test.
Proficiency in scripting languages such as Python, PERL, and Tcl/Tk.
Strong written and verbal communication skills.

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